公开(公告)号：US20250006777A1

公开(公告)日：2025-01-02

申请号：US18470180

申请日：2023-09-19

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Heng Chen ,  Chi-Yuan Shih ,  Hsin-Li Cheng ,  Shih-Fen Huang ,  Tuo-Hsin Chien ,  Yu-Chi Chang

IPC: H01C17/075 ,  H01C7/00 ,  H01L23/522

Abstract: Resistors and method of forming the same are provided. A device structure according to the present disclosure includes a substrate, a first intermetal dielectric (IMD) layer over the substrate, a resistor that includes a first resistor layer over the first IMD layer, a second resistor layer over the first resistor layer, and a third resistor layer over the second resistor layer, a second IMD layer over the first IMD layer and the resistor, a first contact via extending through the second IMD layer and the third resistor layer and terminating in the first resistor layer, and a second contact via extending through the second IMD layer and the third resistor layer and terminating in the first resistor layer.

公开(公告)号：US12176387B2

公开(公告)日：2024-12-24

申请号：US18362146

申请日：2023-07-31

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsin-Li Cheng ,  Jyun-Ying Lin ,  Alexander Kalnitsky ,  Shih-Fen Huang ,  Shu-Hui Su ,  Ting-Chen Hsu ,  Tuo-Hsin Chien ,  Felix Ying-Kit Tsui ,  Shi-Min Wu ,  Yu-Chi Chang

IPC: H01L29/94 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/764 ,  H01L23/00 ,  H01L29/66 ,  H01L49/02

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a capacitor over a substrate. The capacitor includes a plurality of conductive layers and a plurality of dielectric layers. The plurality of conductive layers and dielectric layers define a base structure and a first protrusion structure extending downward from the base structure towards a bottom surface of the substrate. The first protrusion structure comprises one or more surfaces defining a first cavity. A top of the first cavity is disposed below the base structure.

公开(公告)号：US11769792B2

公开(公告)日：2023-09-26

申请号：US17370067

申请日：2021-07-08

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsin-Li Cheng ,  Jyun-Ying Lin ,  Alexander Kalnitsky ,  Shih-Fen Huang ,  Shu-Hui Su ,  Ting-Chen Hsu ,  Tuo-Hsin Chien ,  Felix Ying-Kit Tsui ,  Shi-Min Wu ,  Yu-Chi Chang

IPC: H01L29/94 ,  H01L23/00 ,  H01L29/66 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/764 ,  H01L49/02

CPC classification number: H01L28/91 ,  H01L21/02164 ,  H01L21/02236 ,  H01L21/32139 ,  H01L21/764 ,  H01L23/562 ,  H01L28/92 ,  H01L29/66181 ,  H01L29/945

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a substrate comprising sidewalls that define a trench. A capacitor comprising a plurality of conductive layers and a plurality of dielectric layers that define a trench segment is disposed within the trench. A width of the trench segment continuously increases from a front-side surface of the substrate in a direction towards a bottom surface of the trench.

公开(公告)号：US20210343881A1

公开(公告)日：2021-11-04

申请号：US17370067

申请日：2021-07-08

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsin-Li Cheng ,  Jyun-Ying Lin ,  Alexander Kalnitsky ,  Shih-Fen Huang ,  Shu-Hui Su ,  Ting-Chen Hsu ,  Tuo-Hsin Chien ,  Felix Ying-Kit Tsui ,  Shi-Min Wu ,  Yu-Chi Chang

IPC: H01L29/94 ,  H01L49/02 ,  H01L23/00 ,  H01L29/66 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/764

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a substrate comprising sidewalls that define a trench. A capacitor comprising a plurality of conductive layers and a plurality of dielectric layers that define a trench segment is disposed within the trench. A width of the trench segment continuously increases from a front-side surface of the substrate in a direction towards a bottom surface of the trench.

公开(公告)号：US10763329B2

公开(公告)日：2020-09-01

申请号：US16459497

申请日：2019-07-01

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Wen-Shun Lo ,  Yu-Chi Chang ,  Felix Ying-Kit Tsui

IPC: H01L29/10 ,  H01L29/78 ,  H01L21/762 ,  H01L21/265 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor substrate, a gate electrode, a channel region, a pair of source/drain regions and a threshold voltage adjusting region. The gate electrode is over the semiconductor substrate. The channel region is between the semiconductor substrate and the gate electrode. The channel region includes a pair of first sides opposing to each other in a channel length direction, and a pair of second sides opposing to each other in a channel width direction. The source/drain regions are adjacent to the pair of first sides of the channel region in the channel length direction. The threshold voltage adjusting region covers the pair of second sides of the channel region in the channel width direction, and exposing the pair of first sides of the channel region in the channel length direction.

公开(公告)号：US10658456B2

公开(公告)日：2020-05-19

申请号：US16222464

申请日：2018-12-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Wen-Shun Lo ,  Yu-Chi Chang ,  Felix Ying-Kit Tsui

IPC: H01L21/426 ,  H01L29/06 ,  H01L21/285 ,  H01L29/66 ,  H01L29/872 ,  H01L21/266 ,  H01L27/08 ,  H01L21/225 ,  H01L27/06

Abstract: The present disclosure provides a method of manufacturing a Schottky diode. The method includes: providing a substrate; forming a first well region in the substrate; defining a first portion and a second portion on a surface of the first well region and performing a first ion implantation on the first portion while keeping the second portion from being implanted; forming a first doped region by heating the substrate to cause dopant diffusion between the first portion and the second portion; and forming a metal-containing layer on the first doped region to obtain a Schottky barrier interface.

公开(公告)号：US10340343B2

公开(公告)日：2019-07-02

申请号：US15862489

申请日：2018-01-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Wen-Shun Lo ,  Yu-Chi Chang ,  Felix Ying-Kit Tsui

IPC: H01L29/10 ,  H01L29/78 ,  H01L21/762 ,  H01L21/265 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor substrate, a gate electrode, a pair of source/drain regions and a a threshold voltage adjusting region. The gate electrode is over the semiconductor substrate. The channel region is between the semiconductor substrate and the gate electrode. The source/drain regions are adjacent to two opposing sides of the channel region in a channel length direction. The threshold voltage adjusting region is adjacent to two opposing sides of the channel region in a channel width direction, wherein the threshold voltage adjusting region and the channel region have the same doping type.

公开(公告)号：US20240379808A1

公开(公告)日：2024-11-14

申请号：US18780193

申请日：2024-07-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wen-Shun Lo ,  Yu-Chi Chang ,  Yingkit Felix Tsui

IPC: H01L29/47 ,  H01L29/06 ,  H01L29/66 ,  H01L29/872

Abstract: A semiconductor device includes a substrate having a P-well region, an N-well region disposed on either side of and abutting the P-well region, and a deep N-well region disposed beneath and abutting both the P-well region and at least part of the N-well region on either side of the P-well region. The semiconductor device further includes a first conductive layer formed over a cathode region of the P-well region, where a Schottky barrier is formed at a junction of the first conductive layer and the P-well region. The semiconductor device further includes a second conductive layer formed over anode regions of the P-well region, where the anode regions are disposed on either side of the cathode region.

公开(公告)号：US09978645B2

公开(公告)日：2018-05-22

申请号：US14815068

申请日：2015-07-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Yu-Chi Chang ,  Hsin-Li Cheng ,  Felix Ying-Kit Tsui

IPC: H01L21/336 ,  H01L21/8234 ,  H01L21/265 ,  H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L21/8238

CPC classification number: H01L21/823462 ,  H01L21/2652 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L29/105 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/7833

Abstract: The present disclosure relates to a semiconductor device and method of manufacturing the same. The method of manufacturing the semiconductor device includes: providing a substrate, forming a patterned semiconductor layer on the substrate, forming a filter layer to cover the patterned semiconductor layer and forming a low concentration dopant buried layer within the semiconductor substrate, wherein one to forty percent of dopant are filtered out by the filter layer in the formation of the low concentration dopant buried layer.

公开(公告)号：US12191374B2

公开(公告)日：2025-01-07

申请号：US18323457

申请日：2023-05-25

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsin-Li Cheng ,  Liang-Tai Kuo ,  Yu-Chi Chang

IPC: H01L29/66 ,  H01L21/3115 ,  H01L21/324 ,  H01L29/51

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a gate electrode disposed on a substrate. Source/drain regions are disposed on or within the substrate along opposing sides of the gate electrode. A noise reducing component is arranged along an upper surface of the gate electrode and/or along an upper surface of the substrate over the source/drain regions. A cap layer covers the upper surface of the gate electrode and/or the upper surface of the substrate over the source/drain regions. An inter-level dielectric (ILD) is disposed over and along one or more sidewalls of the cap layer.