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公开(公告)号：US10510722B2
公开(公告)日：2019-12-17
申请号：US15725240
申请日：2017-10-04
发明人： Weiming Chris Chen , Tu-Hao Yu , Kuo-Chiang Ting , Shang-Yun Hou , Chi-Hsi Wu
IPC分类号： H01L25/065 , H01L23/00 , H01L23/50 , H01L25/16 , H01L25/00 , H01L23/498 , H01L23/538 , H01L49/02 , H01L23/13
摘要： A semiconductor device includes a first electronic component, a second electronic component and a plurality of interconnection structures. The first electronic component has a first surface. The second electronic component is over the first electronic component, and the second electronic component has a second surface facing the first surface of the first electronic component. The interconnection structures are between and electrically connected to the first electronic component and the second electronic component, wherein each of the interconnection structures has a length along a first direction substantially parallel to the first surface and the second surface, a width along a second direction substantially parallel to the first surface and the second surface and substantially perpendicular to the first direction, and the length is larger than the width of at least one of the interconnection structures.
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公开(公告)号：US20210225666A1
公开(公告)日：2021-07-22
申请号：US16745610
申请日：2020-01-17
发明人： Shih Ting Lin , Szu-Wei Lu , Weiming Chris Chen , Kuo-Chiang Ting , Shang-Yun Hou , Chi-Hsi Wu
IPC分类号： H01L21/56 , H01L21/48 , H01L21/768
摘要： A method includes attaching semiconductor devices to an interposer structure, attaching the interposer structure to a first carrier substrate, attaching integrated passive devices to the first carrier substrate, forming an encapsulant over the semiconductor devices and the integrated passive devices, debonding the first carrier substrate, attaching the encapsulant and the semiconductor devices to a second carrier substrate, forming a first redistribution structure on the encapsulant, the interposer structure, and the integrated passive devices, wherein the first redistribution structure contacts the interposer structure and the integrated passive devices, and forming external connectors on the first redistribution structure.
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公开(公告)号：US10304800B2
公开(公告)日：2019-05-28
申请号：US15800962
申请日：2017-11-01
发明人： Weiming Chris Chen , Ting-Yu Yeh , Chia-Hsin Chen , Tu-Hao Yu , Kuo-Chiang Ting , Shang-Yun Hou , Chi-Hsi Wu
IPC分类号： H01L23/02 , H01L21/00 , H01L25/065 , H01L23/31 , H01L23/00 , H01L21/56 , H01L25/00 , H01L23/498 , H01L25/16
摘要： A semiconductor structure includes a first substrate including a first surface and a second surface opposite to the first surface; a first die disposed over the second surface of the first substrate; a plurality of first conductive bumps disposed between the first die and the first substrate; a molding disposed over the first substrate and surrounding the first die and the plurality of first conductive bumps; a second substrate disposed below the first surface of the first substrate; a plurality of second conductive bumps disposed between the first substrate and the second substrate; and a second die disposed between the first substrate and the second substrate.
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公开(公告)号：US20170373022A1
公开(公告)日：2017-12-28
申请号：US15681513
申请日：2017-08-21
发明人： Wen Hsin Wei , Hsien-Pin Hu , Shang-Yun Hou , Weiming Chris Chen
摘要： A method includes performing a first light-exposure and a second a second light-exposure on a photo resist. The first light-exposure is performed using a first lithograph mask, which covers a first portion of the photo resist. The first portion of the photo resist has a first strip portion exposed in the first light-exposure. The second light-exposure is performed using a second lithograph mask, which covers a second portion of the photo resist. The second portion of the photo resist has a second strip portion exposed in the second light-exposure. The first strip portion and the second strip portion have an overlapping portion that is double exposed. The method further includes developing the photo resist to remove the first strip portion and the second strip portion, etching a dielectric layer underlying the photo resist to form a trench, and filling the trench with a conductive feature.
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公开(公告)号：US11462418B2
公开(公告)日：2022-10-04
申请号：US16745610
申请日：2020-01-17
发明人： Shih Ting Lin , Szu-Wei Lu , Weiming Chris Chen , Kuo-Chiang Ting , Shang-Yun Hou , Chi-Hsi Wu
IPC分类号： H01L21/48 , H01L21/56 , H01L23/00 , H01L23/498 , H01L23/14 , H01L25/065 , H01L21/768 , H01L23/538 , H01L23/31
摘要： A method includes attaching semiconductor devices to an interposer structure, attaching the interposer structure to a first carrier substrate, attaching integrated passive devices to the first carrier substrate, forming an encapsulant over the semiconductor devices and the integrated passive devices, debonding the first carrier substrate, attaching the encapsulant and the semiconductor devices to a second carrier substrate, forming a first redistribution structure on the encapsulant, the interposer structure, and the integrated passive devices, wherein the first redistribution structure contacts the interposer structure and the integrated passive devices, and forming external connectors on the first redistribution structure.
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公开(公告)号：US10515869B1
公开(公告)日：2019-12-24
申请号：US15992045
申请日：2018-05-29
发明人： Ting-Yu Yeh , Chia-Hao Hsu , Weiming Chris Chen , Kuo-Chiang Ting , Tu-Hao Yu , Shang-Yun Hou
IPC分类号： H01L27/06 , H01L23/373 , H01L23/00 , H01L21/66
摘要： A semiconductor package structure includes a substrate, a first semiconductor and a second semiconductor over the substrate, and a multi-TIM structure disposed over the first semiconductor die and the second semiconductor die. The first semiconductor die includes a first heat output and the second semiconductor die includes a second heat output less than the first heat output. The multi-TIM structure includes a first TIM layer disposed over at least a portion of the first semiconductor die and a second TIM layer. A thermal conductivity of the first TIM layer is higher than a thermal conductivity of the second TIM layer. The first TIM layer covers the first semiconductor die.
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公开(公告)号：US12062590B2
公开(公告)日：2024-08-13
申请号：US16725189
申请日：2019-12-23
发明人： Ting-Yu Yeh , Chia-Hao Hsu , Weiming Chris Chen , Kuo-Chiang Ting , Tu-Hao Yu , Shang-Yun Hou
IPC分类号： H01L23/373 , H01L21/66 , H01L23/00 , H01L27/06
CPC分类号： H01L23/3735 , H01L22/32 , H01L23/562 , H01L24/17 , H01L27/0688 , H01L2924/3511 , H01L2924/3512
摘要： A semiconductor package structure includes a substrate, a first semiconductor and a second semiconductor over the substrate, and a multi-TIM structure disposed over the first semiconductor die and the second semiconductor die. The first semiconductor die includes a first heat output and the second semiconductor die includes a second heat output less than the first heat output. The multi-TIM structure includes a first TIM layer disposed over at least a portion of the first semiconductor die and a second TIM layer. A thermal conductivity of the first TIM layer is higher than a thermal conductivity of the second TIM layer. The first TIM layer covers the first semiconductor die.
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公开(公告)号：US20230386985A1
公开(公告)日：2023-11-30
申请号：US18359864
申请日：2023-07-26
发明人： Ting-Yu Yeh , Cing-He Chen , Kuo-Chiang Ting , Weiming Chris Chen , Chia-Hao Hsu , Kuan-Yu Huang , Shu-Chia Hsu
IPC分类号： H01L23/498 , H01L21/48 , H01L25/065
CPC分类号： H01L23/49816 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L23/49822 , H01L23/49833 , H01L23/49838 , H01L25/0655
摘要： A semiconductor structure includes a solder resist layer disposed on a circuit substrate and partially covering contact pads of the circuit substrate, and external terminals disposed on the solder resist layer and extending through the solder resist layer to land on the contact pads. The external terminals include a first external terminal and a second external terminal which have different heights. A first interface between the first external terminal and corresponding one of the contact pads underlying the first external terminal is less than a second interface between the second external terminal and another corresponding one of the contact pads underlying the second external terminal.
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公开(公告)号：US11444038B2
公开(公告)日：2022-09-13
申请号：US16704303
申请日：2019-12-05
发明人： Wen Hsin Wei , Hsien-Pin Hu , Shang-Yun Hou , Weiming Chris Chen
IPC分类号： H01L23/00 , H01L21/768 , H01L23/58 , H01L23/31 , H01L25/00 , H01L23/532 , H01L25/065
摘要： A method includes performing a first light-exposure and a second a second light-exposure on a photo resist. The first light-exposure is performed using a first lithograph mask, which covers a first portion of the photo resist. The first portion of the photo resist has a first strip portion exposed in the first light-exposure. The second light-exposure is performed using a second lithograph mask, which covers a second portion of the photo resist. The second portion of the photo resist has a second strip portion exposed in the second light-exposure. The first strip portion and the second strip portion have an overlapping portion that is double exposed. The method further includes developing the photo resist to remove the first strip portion and the second strip portion, etching a dielectric layer underlying the photo resist to form a trench, and filling the trench with a conductive feature.
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公开(公告)号：US10515906B2
公开(公告)日：2019-12-24
申请号：US15681513
申请日：2017-08-21
发明人： Wen Hsin Wei , Hsien-Pin Hu , Shang-Yun Hou , Weiming Chris Chen
摘要： A method includes performing a first light-exposure and a second a second light-exposure on a photo resist. The first light-exposure is performed using a first lithograph mask, which covers a first portion of the photo resist. The first portion of the photo resist has a first strip portion exposed in the first light-exposure. The second light-exposure is performed using a second lithograph mask, which covers a second portion of the photo resist. The second portion of the photo resist has a second strip portion exposed in the second light-exposure. The first strip portion and the second strip portion have an overlapping portion that is double exposed. The method further includes developing the photo resist to remove the first strip portion and the second strip portion, etching a dielectric layer underlying the photo resist to form a trench, and filling the trench with a conductive feature.
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