公开(公告)号：US11594610B2

公开(公告)日：2023-02-28

申请号：US17165142

申请日：2021-02-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Hang Chiu ,  Chung-Chiang Wu ,  Jo-Chun Hung ,  Wei-Cheng Wang ,  Kuan-Ting Liu ,  Chi On Chui

IPC: H01L29/49 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/28 ,  H01L21/8238 ,  H01L29/66

Abstract: Semiconductor devices having improved gate electrode structures and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate structure over a semiconductor substrate, the gate structure including a high-k dielectric layer; an n-type work function layer over the high-k dielectric layer; an anti-reaction layer over the n-type work function layer, the anti-reaction layer including a dielectric material; a p-type work function layer over the anti-reaction layer, the p-type work function layer covering top surfaces of the anti-reaction layer; and a conductive cap layer over the p-type work function layer.

公开(公告)号：US20220123124A1

公开(公告)日：2022-04-21

申请号：US17165142

申请日：2021-02-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Hang Chiu ,  Chung-Chiang Wu ,  Jo-Chun Hung ,  Wei-Cheng Wang ,  Kuan-Ting Liu ,  Chi On Chui

IPC: H01L29/49 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/28 ,  H01L21/8238 ,  H01L29/66

Abstract: Semiconductor devices having improved gate electrode structures and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate structure over a semiconductor substrate, the gate structure including a high-k dielectric layer; an n-type work function layer over the high-k dielectric layer; an anti-reaction layer over the n-type work function layer, the anti-reaction layer including a dielectric material; a p-type work function layer over the anti-reaction layer, the p-type work function layer covering top surfaces of the anti-reaction layer; and a conductive cap layer over the p-type work function layer.

公开(公告)号：US12148810B2

公开(公告)日：2024-11-19

申请号：US18154087

申请日：2023-01-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Hang Chiu ,  Chung-Chiang Wu ,  Jo-Chun Hung ,  Wei-Cheng Wang ,  Kuan-Ting Liu ,  Chi On Chui

IPC: H01L29/49 ,  H01L21/02 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: Semiconductor devices having improved gate electrode structures and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate structure over a semiconductor substrate, the gate structure including a high-k dielectric layer; an n-type work function layer over the high-k dielectric layer; an anti-reaction layer over the n-type work function layer, the anti-reaction layer including a dielectric material; a p-type work function layer over the anti-reaction layer, the p-type work function layer covering top surfaces of the anti-reaction layer; and a conductive cap layer over the p-type work function layer.

公开(公告)号：US09772563B2

公开(公告)日：2017-09-26

申请号：US13928414

申请日：2013-06-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yung-Ho Chen ,  Wen-Chieh Tsou ,  Chih-Wei Huang ,  Wei-Cheng Wang

IPC: H01L21/677 ,  G03F7/20 ,  G05B19/418

CPC classification number: G03F7/70741 ,  G05B19/4189 ,  G05B2219/45031 ,  G05B2219/45057 ,  Y02P90/28

Abstract: At least a first reticle is stored in a housing of a stocker. A first gas is delivered to the housing. At least one reticle pod having an additional reticle is delivered into a enclosure within the housing of the stocker. A second gas different from the first gas is delivered to the enclosure. The reticle pod is automatically retrieved from the enclosure. The delivery and retrieval of the reticle pod and delivery of the first gas and the second gas are automatically controlled.

公开(公告)号：US20170222000A1

公开(公告)日：2017-08-03

申请号：US15009831

申请日：2016-01-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Liang-Chen Chi ,  Chia-Ming Tsai ,  Chin-Kun Wang ,  Wei-Cheng Wang ,  Miin-Jang Chen

IPC: H01L29/40 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/408 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate, a gate over the substrate and a gate dielectric layer between the gate and the substrate. The gate dielectric layer includes an oxide-inhibiting layer having a dielectric constant greater than about 8 and being in an amorphous state.

公开(公告)号：US20240379810A1

公开(公告)日：2024-11-14

申请号：US18782846

申请日：2024-07-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Hang Chiu ,  Chung-Chiang Wu ,  Jo-Chun Hung ,  Wei-Cheng Wang ,  Kuan-Ting Liu ,  Chi On Chui

IPC: H01L29/49 ,  H01L21/02 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: Semiconductor devices having improved gate electrode structures and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate structure over a semiconductor substrate, the gate structure including a high-k dielectric layer; an n-type work function layer over the high-k dielectric layer; an anti-reaction layer over the n-type work function layer, the anti-reaction layer including a dielectric material; a p-type work function layer over the anti-reaction layer, the p-type work function layer covering top surfaces of the anti-reaction layer; and a conductive cap layer over the p-type work function layer.

公开(公告)号：US20230155002A1

公开(公告)日：2023-05-18

申请号：US17700998

申请日：2022-03-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Hang Chiu ,  Wei-Cheng Wang ,  Chung-Chiang Wu ,  Chi On Chui

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L21/02 ,  H01L21/28

CPC classification number: H01L29/66545 ,  H01L21/0259 ,  H01L21/28088 ,  H01L29/0665 ,  H01L29/4908 ,  H01L29/42392 ,  H01L29/66553 ,  H01L29/66742 ,  H01L29/78696

Abstract: Embodiments provide a replacement metal gate in a FinFET or nanoFET which utilizes a conductive metal fill. The conductive metal fill has an upper surface which has a fin shape which may be used for a self-aligned contact.

公开(公告)号：US20230140968A1

公开(公告)日：2023-05-11

申请号：US18154087

申请日：2023-01-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Hang Chiu ,  Chung-Chiang Wu ,  Jo-Chun Hung ,  Wei-Cheng Wang ,  Kuan-Ting Liu ,  Chi On Chui

IPC: H01L29/49 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L21/8238 ,  H01L21/28

CPC classification number: H01L29/4908 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/78696 ,  H01L21/02603 ,  H01L29/66742 ,  H01L21/823807 ,  H01L21/823842 ,  H01L21/823864 ,  H01L29/66553 ,  H01L29/66545 ,  H01L21/28088

Abstract: Semiconductor devices having improved gate electrode structures and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate structure over a semiconductor substrate, the gate structure including a high-k dielectric layer; an n-type work function layer over the high-k dielectric layer; an anti-reaction layer over the n-type work function layer, the anti-reaction layer including a dielectric material; a p-type work function layer over the anti-reaction layer, the p-type work function layer covering top surfaces of the anti-reaction layer; and a conductive cap layer over the p-type work function layer.

公开(公告)号：US09876083B2

公开(公告)日：2018-01-23

申请号：US15009831

申请日：2016-01-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Liang-Chen Chi ,  Chia-Ming Tsai ,  Chin-Kun Wang ,  Wei-Cheng Wang ,  Miin-Jang Chen

IPC: H01L29/66 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/408 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate, a gate over the substrate and a gate dielectric layer between the gate and the substrate. The gate dielectric layer includes an oxide-inhibiting layer having a dielectric constant greater than about 8 and being in an amorphous state.

公开(公告)号：US09576834B2

公开(公告)日：2017-02-21

申请号：US14658631

申请日：2015-03-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Cheng Wang ,  Feng-Ning Lee ,  Bing-Yuan Cheng

IPC: G06F7/00 ,  H01L21/677 ,  B65G1/04

CPC classification number: H01L21/67766 ,  B65G1/0464 ,  H01L21/67733 ,  H01L21/67736 ,  H01L21/67769

Abstract: A stocker includes a storage shelf, an output-relay shelf, a first crane, an output shelf, a second crane, and a controller. The storage shelf has a plurality of storage spaces. The output-relay shelf has a plurality of first output-relay spaces. The output shelf has an output space. The controller is configured to drive the first crane to preferentially transfer a first wafer carrier stored in one of the storage spaces to an empty one of the first output-relay spaces according to a delivery command defining a high priority of the first wafer carrier, and configured to drive the second crane to preferentially transfer the first wafer carrier from the first output-relay space storing the first wafer carrier to the output space according to the delivery command if the output space is empty.

Abstract translation: 储料机包括储存架，输出继电器架，第一起重机，输出架，第二起重机和控制器。 存储架具有多个存放空间。 输出继电器架具有多个第一输出继电器空间。 输出架有一个输出空间。 控制器被配置为根据限定第一晶片载体的高优先级的传送命令，驱动第一起重机以将存储在其中一个存储空间中的第一晶片载体优先地传送到空的第一输出中继空间中;以及 被配置为如果所述输出空间为空，则驱动所述第二起重机优先地将所述第一晶片载体从存储所述第一晶片载体的所述第一输出中继空间传送到所述输出空间。