公开(公告)号：US20200273695A1

公开(公告)日：2020-08-27

申请号：US16283109

申请日：2019-02-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal A. KHADERBAD ,  Keng-Chu LIN ,  Shuen-Shin LIANG ,  Sung-Li WANG ,  Yasutoshi OKUNO ,  Yu-Yun PENG

IPC: H01L21/02 ,  H01L21/768

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a dielectric structure on a semiconductor substrate, introducing a first gas on the dielectric structure to form first conductive structures on the dielectric structure, and introducing a second gas on the first conductive structures and the dielectric structure. The second gas is different from the first gas. The method also includes introducing a third gas on the first conductive structures and the dielectric structure to form second conductive structures on the dielectric structure. The first gas and the third gas include the same metal.

公开(公告)号：US20200035787A1

公开(公告)日：2020-01-30

申请号：US16252405

申请日：2019-01-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Sung-Li WANG ,  Mrunal A. KHADERBAD ,  Yasutoshi OKUNO

IPC: H01L29/08 ,  H01L29/165 ,  H01L29/45 ,  H01L23/535 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/768 ,  H01L21/762 ,  H01L21/02 ,  H01L21/285 ,  H01L29/66 ,  H01L29/417

Abstract: A semiconductor device includes a first semiconductor fin, a first epitaxial layer, a first alloy layer and a contact plug. The first semiconductor fin is on a substrate. The first epitaxial layer is on the first semiconductor fin. The first alloy layer is on the first epitaxial layer. The first alloy layer is made of one or more Group IV elements and one or more metal elements, and the first alloy layer comprises a first sidewall and a second sidewall extending downwardly from a bottom of the first sidewall along a direction non-parallel to the first sidewall. The contact plug is in contact with the first and second sidewalls of the first alloy layer.

公开(公告)号：US20200058769A1

公开(公告)日：2020-02-20

申请号：US16151784

申请日：2018-10-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal A. KHADERBAD ,  Sung-Li WANG ,  Yasutoshi OKUNO

IPC: H01L29/66 ,  H01L29/08 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/311 ,  H01L21/033 ,  H01L21/02 ,  H01L21/285

Abstract: Methods for forming semiconductor structures are provided. The method includes forming a gate structure over a substrate and forming a source/drain structure adjacent to the gate structure. The method further includes forming a mask structure over the gate structure and forming a contact over the source/drain structure. The method further includes selectively forming a metal-containing layer over a top surface of the contact and forming a dielectric layer over the substrate and covering the gate structure and the contact. The method further includes forming a trench through the dielectric layer and the metal-containing layer to expose the top surface of the contact and forming a conductive structure in the trench.

公开(公告)号：US20230335592A1

公开(公告)日：2023-10-19

申请号：US18331917

申请日：2023-06-08

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Sung-Li WANG ,  Mrunal A. KHADERBAD ,  Yasutoshi OKUNO

IPC: H01L29/08 ,  H01L29/45 ,  H01L23/535 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/768 ,  H01L21/762 ,  H01L21/02 ,  H01L21/285 ,  H01L29/66 ,  H01L29/417 ,  H01L29/165

CPC classification number: H01L29/0847 ,  H01L29/45 ,  H01L23/535 ,  H01L27/0924 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/76883 ,  H01L21/76802 ,  H01L21/76876 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/76224 ,  H01L21/0262 ,  H01L21/28518 ,  H01L29/665 ,  H01L21/76897 ,  H01L29/41725 ,  H01L29/165 ,  H01L21/02532 ,  H01L29/66545 ,  H01L29/6656 ,  H01L21/0217 ,  H01L21/02271 ,  H01L21/02164 ,  H01L29/6653 ,  H01L21/31116

Abstract: A semiconductor device includes first and second semiconductor fins extending from a substrate, and first and second epitaxial layers wrapping around the first and second semiconductor fins, respectively. The semiconductor device further includes a contact plug over the first epitaxial layer and the second epitaxial layer. The contact plug includes a first interfacial layer over the first epitaxial layer and a second interfacial layer over the second epitaxial layer. The first and second interfacial layers include a noble metal element and a Group IV element.

公开(公告)号：US20210184018A1

公开(公告)日：2021-06-17

申请号：US16717600

申请日：2019-12-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal A. KHADERBAD ,  Keng-Chu LIN

IPC: H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/40 ,  H01L21/768

Abstract: The structure of a semiconductor device with source/drain contact structures and via structures and a method of fabricating the semiconductor device are disclosed. A method for fabricating a semiconductor device includes forming a source/drain (S/D) region on a substrate, forming a S/D contact structure on the S/D region, and forming a via structure on the S/D contact structure. The forming of the via structure includes forming a via opening on the S/D contact structure, forming a non-metal passivation layer on sidewalls of the via opening, and depositing a via plug within the via opening in a bottom-up deposition process.

公开(公告)号：US20210091182A1

公开(公告)日：2021-03-25

申请号：US17107471

申请日：2020-11-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Sung-Li WANG ,  Mrunal A. KHADERBAD ,  Yasutoshi OKUNO

IPC: H01L29/08 ,  H01L29/45 ,  H01L23/535 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/768 ,  H01L21/762 ,  H01L21/02 ,  H01L21/285 ,  H01L29/66 ,  H01L29/417 ,  H01L29/165

Abstract: A semiconductor device includes a first semiconductor fin, a first epitaxial layer, a first alloy layer and a contact plug. The first semiconductor fin is on a substrate. The first epitaxial layer is on the first semiconductor fin. The first alloy layer is on the first epitaxial layer. The first alloy layer is made of one or more Group IV elements and one or more metal elements, and the first alloy layer comprises a first sidewall and a second sidewall extending downwardly from a bottom of the first sidewall along a direction non-parallel to the first sidewall. The contact plug is in contact with the first and second sidewalls of the first alloy layer.

公开(公告)号：US20200350421A1

公开(公告)日：2020-11-05

申请号：US16931590

申请日：2020-07-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal A. KHADERBAD ,  Sung-Li WANG ,  Yasutoshi OKUNO

IPC: H01L29/66 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/311 ,  H01L21/033 ,  H01L21/02 ,  H01L21/285 ,  H01L29/08

Abstract: Semiconductor structures and method for forming the same are provided. The semiconductor structure includes a substrate and a gate structure formed over the substrate. The semiconductor structure further includes a source/drain structure formed adjacent to the gate structure in the substrate and a contact formed over the source/drain structure. The semiconductor structure further includes a metal-containing layer formed over the contact and a dielectric layer covering the gate structure and the metal-containing layer. The semiconductor structure further includes a first conductive structure formed through dielectric layer and the metal-containing layer and landing on the contact. In addition, a bottom surface of the metal-containing layer is higher than a top surface of the gate structure.

公开(公告)号：US20190164828A1

公开(公告)日：2019-05-30

申请号：US15940872

申请日：2018-03-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Mrunal A. KHADERBAD ,  Yasutoshi OKUNO ,  Pang-Yen TSAI

IPC: H01L21/768 ,  H01L29/417 ,  H01L23/522 ,  H01L21/3213 ,  H01L21/285

Abstract: A semiconductor device is provided. The semiconductor device includes a source/drain region, a silicide layer on the source/drain region, an interlayer dielectric (ILD) layer over the silicide layer, and a source drain contact. The source/drain contact has a top portion extending through the ILD layer and a bottom portion embedded in the silicide layer.