公开(公告)号：US20200135883A1

公开(公告)日：2020-04-30

申请号：US16258408

申请日：2019-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sai-Hooi YEONG ,  Chi-On CHUI ,  Bo-Feng YOUNG ,  Bo-Yu LAI ,  Kuan-Lun CHENG ,  Chih-Hao WANG

IPC: H01L29/66 ,  H01L29/08

Abstract: A FinFET device structure is provided. The FinFET device structure includes a fin structure formed over a substrate, and a gate structure formed over the fin structure. The FinFET device structure also includes an epitaxial source/drain (S/D) structure formed over the fin structure. A top surface and a sidewall of the fin structure are surrounded by the epitaxial S/D structure. A first distance between an outer surface of the epitaxial S/D structure and the sidewall of the fin structure is no less than a second distance between the outer surface of the epitaxial S/D structure and the top surface of the fin structure.

公开(公告)号：US20210118749A1

公开(公告)日：2021-04-22

申请号：US17113209

申请日：2020-12-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Bo-Yu LAI ,  Kai-Hsuan LEE ,  Wei-Yang LEE ,  Feng-Cheng YANG ,  Yen-Ming CHEN

IPC: H01L21/8238 ,  H01L29/66 ,  H01L29/06 ,  H01L27/092 ,  H01L29/78 ,  H01L21/8234

Abstract: A semiconductor device includes a gate stack, an epitaxy structure, a first spacer, a second spacer, and a dielectric residue. The gate stack is over a substrate. The epitaxy structure is formed raised above the substrate. The first spacer is on a sidewall of the gate stack. The first spacer and the epitaxy structure define an air gap therebetween. The second spacer seals the air gap between the first spacer and the epitaxy structure. The dielectric residue is in the air gap and has an upper portion and a lower portion under the upper portion. The upper portion of the dielectric residue has higher etch resistance to phosphoric acid than that of the lower portion of the dielectric residue.

公开(公告)号：US20190148519A1

公开(公告)日：2019-05-16

申请号：US15875485

申请日：2018-01-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kai-Hsuan LEE ,  Bo-Yu LAI ,  Chi-On CHUI ,  Cheng-Yu YANG ,  Yen-Ting CHEN ,  Sai-Hooi YEONG ,  Feng-Cheng YANG ,  Yen-Ming CHEN

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L29/417 ,  H01L21/306 ,  H01L21/762

Abstract: A semiconductor device and a method for forming the same are provided. The method includes forming a gate structure over a fin structure. The method further includes forming first gate spacers on opposite sidewalls of the gate structure. The method further includes forming source/drain features in the fin structure and adjacent to the first gate spacers. The method further includes performing a surface treatment process on top surfaces of the source/drain features and outer sidewalls of the first gate spacers. The method further includes depositing a contact etch stop layer (CESL) over the source/drain features and the first gate spacers. A first portion of the CESL is deposited over the top surfaces of the source/drain features at a first deposition rate. A second portion of the CESL is deposited over the outer sidewalls of the first gate spacers at a second deposition rate.

公开(公告)号：US20160204195A1

公开(公告)日：2016-07-14

申请号：US14592089

申请日：2015-01-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Tsung-Yao WEN ,  Sai-Hooi YEONG ,  Bo-Yu LAI ,  Sheng-Chen WANG

IPC: H01L29/06 ,  H01L21/02 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78 ,  H01L29/423

CPC classification number: H01L29/0673 ,  H01L21/02532 ,  H01L29/1037 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/7851

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a fin structure formed over the substrate. The semiconductor structure further includes a first wire structure formed over the fin structure and a source structure and a drain structure formed at two opposite sides of the fin structure. The semiconductor structure further includes a gate structure formed over the fin structure. In addition, the fin structure and the first wire structure are separated by the gate structure.

Abstract translation: 提供半导体结构及其形成方法。 该半导体结构包括在基板上形成的基板和翅片结构。 半导体结构还包括形成在翅片结构上的第一线结构和形成在翅片结构的两个相对侧处的源极结构和漏极结构。 半导体结构还包括形成在鳍结构上的栅极结构。 此外，鳍结构和第一线结构被栅极结构分开。

公开(公告)号：US20240088155A1

公开(公告)日：2024-03-14

申请号：US18510370

申请日：2023-11-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Bo-Yu LAI ,  Kai-Hsuan LEE ,  Wei-Yang LEE ,  Feng-Cheng YANG ,  Yen-Ming CHEN

IPC: H01L27/092 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/0924 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823864 ,  H01L29/0653 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/31111

Abstract: A semiconductor device includes source/drain regions, a gate structure, a first gate spacer, and a dielectric material. The source/drain regions are over a substrate. The gate structure is laterally between the source/drain regions. The first gate spacer is on a first sidewall of the gate structure, and spaced apart from a first one of the source/drain regions at least in part by a void region. The dielectric material is between the first one of the source/drain regions and the void region. The dielectric material has a gradient ratio of a first chemical element to a second chemical element.

公开(公告)号：US20220384442A1

公开(公告)日：2022-12-01

申请号：US17885383

申请日：2022-08-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Bo-Yu LAI ,  Kai-Hsuan LEE ,  Wei-Yang LEE ,  Feng-Cheng YANG ,  Yen-Ming CHEN

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L21/8234

Abstract: A semiconductor device includes a gate stack, an epitaxy structure, a first spacer, a second spacer, and a dielectric residue. The gate stack is over a substrate. The epitaxy structure is formed raised above the substrate. The first spacer is on a sidewall of the gate stack. The first spacer and the epitaxy structure define a void therebetween. The second spacer seals the void between the first spacer and the epitaxy structure. The dielectric residue is in the void and has an upper portion and a lower portion under the upper portion. The upper portion of the dielectric residue has a silicon-to-nitrogen atomic ratio higher than a silicon-to-nitrogen atomic ratio of the lower portion of the dielectric residue.

公开(公告)号：US20200135590A1

公开(公告)日：2020-04-30

申请号：US16412007

申请日：2019-05-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Bo-Yu LAI ,  Kai-Hsuan LEE ,  Wei-Yang LEE ,  Feng-Cheng YANG ,  Yen-Ming CHEN

IPC: H01L21/8238 ,  H01L29/66 ,  H01L29/06 ,  H01L27/092

Abstract: A method includes forming a gate stack over a semiconductor substrate, forming a first spacer layer on a sidewall of the gate stack, forming a sacrificial spacer film over the first spacer layer, forming an epitaxy structure on the semiconductor substrate, and performing an etching process on the sacrificial spacer film to form a gap between the first spacer layer and the epitaxy structure. An outer portion of the sacrificial spacer film has a topmost end higher than that of an inner portion of the sacrificial spacer film after performing the etching process. The method further includes forming a second spacer layer to seal the gap between the epitaxy structure and the first spacer layer.