公开(公告)号：US20200273773A1

公开(公告)日：2020-08-27

申请号：US16283852

申请日：2019-02-25

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Albert Wan ,  Chen-Hua Yu ,  Chung-Shi Liu ,  Chao-Wen Shih ,  Han-Ping Pu ,  Hsin-Yu Pan ,  Sen-Kuei Hsu

IPC分类号： H01L23/373 ,  H01L23/31 ,  H01L23/538 ,  H01L23/66 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/22 ,  H01Q1/02

摘要： A semiconductor device including a chip package and an antenna package disposed on the chip package is provided. The chip package includes a semiconductor chip, an encapsulation enclosing the semiconductor chip, and a redistribution structure disposed on the semiconductor chip and the encapsulation and electrically coupled to the semiconductor chip. The antenna package includes an antenna pattern electrically coupled to the chip package, and an intermediate structure disposed between the antenna pattern and the chip package, wherein the intermediate structure comprises a ceramic element in contact with the redistribution structure and thermally dissipating a heat generated from the semiconductor chip.

公开(公告)号：US11282810B2

公开(公告)日：2022-03-22

申请号：US16923115

申请日：2020-07-08

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Albert Wan ,  Ching-Hua Hsieh ,  Chung-Hao Tsai ,  Chuei-Tang Wang ,  Chao-Wen Shih ,  Han-Ping Pu ,  Chien-Ling Hwang ,  Pei-Hsuan Lee ,  Tzu-Chun Tang ,  Yu-Ting Chiu ,  Jui-Chang Kuo

IPC分类号： H01L23/00 ,  H01L23/538 ,  H01L21/768 ,  H01L21/48 ,  H01L23/66 ,  H01L25/00 ,  H01L21/56 ,  H01L25/065 ,  H01L23/31 ,  H01L21/683 ,  H01L23/544

摘要： A method of manufacturing an integrated fan-out (InFO) package includes at least the following steps. A package array is formed. A core layer and a dielectric layer are sequentially stacked over the package array. The core layer includes a plurality of cavities. A plurality of first conductive patches is formed on the dielectric layer above the cavities.

公开(公告)号：US20200335459A1

公开(公告)日：2020-10-22

申请号：US16916066

申请日：2020-06-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Albert Wan ,  Ching-Hua Hsieh ,  Chao-Wen Shih ,  Han-Ping Pu ,  Meng-Tse Chen ,  Sheng-Hsiang Chiu

IPC分类号： H01L23/66 ,  H01L23/522 ,  H01L23/31 ,  H01L21/56

摘要： A semiconductor device including a chip package, a dielectric structure, and a first antenna pattern is provided. The dielectric structure is disposed on the chip package and includes a cavity and a vent in communication with the cavity. The first antenna pattern is disposed on the dielectric structure, wherein the chip package is electrically coupled to the first antenna pattern, and the cavity of the dielectric structure is disposed between the chip package and the first antenna pattern.

公开(公告)号：US10741508B2

公开(公告)日：2020-08-11

申请号：US15965995

申请日：2018-04-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Albert Wan ,  Ching-Hua Hsieh ,  Chao-Wen Shih ,  Han-Ping Pu ,  Meng-Tse Chen ,  Sheng-Hsiang Chiu

IPC分类号： H01L23/66 ,  H01L23/522 ,  H01L23/31 ,  H01L21/56

摘要： A semiconductor device including a chip package, a dielectric structure and a first antenna pattern is provided. The dielectric structure disposed on the chip package and includes a cavity and a vent in communication with the cavity. The first antenna pattern disposed on the dielectric structure, wherein the chip package is electrically coupled to the first antenna pattern, and the cavity of the dielectric structure is disposed between the chip package and the first antenna pattern. A manufacturing method of a semiconductor device is also provided.

公开(公告)号：US20190157206A1

公开(公告)日：2019-05-23

申请号：US15965980

申请日：2018-04-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chuei-Tang Wang ,  Chung-Hao Tsai ,  Chen-Hua Yu ,  Chun-Lin Lu ,  Chao-Wen Shih ,  Han-Ping Pu ,  Kai-Chiang Wu ,  Albert Wan

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065 ,  H01L23/28

CPC分类号： H01L23/5384 ,  H01L21/56 ,  H01L21/6835 ,  H01L23/28 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/66 ,  H01L24/18 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/18

摘要： A package structure includes a first redistribution layer, a second redistribution layer, at least one semiconductor chip, an insulating encapsulation, a protection layer, and at least one connecting module. The at least one semiconductor chip is located between and electrically connected to the first redistribution layer and the second redistribution layer. The insulating encapsulation encapsulates the at least one semiconductor chip. The protection layer is disposed on and partially covers the first redistribution layer, wherein the first redistribution layer is located between the at least one semiconductor chip and the protection layer. The at least one connecting module connects to the first redistribution layer and is electrically connected to the at least one semiconductor chip through the first redistribution layer, wherein the at least one connecting module comprises a plurality of pins, and the at least one connecting module is mounted onto the first redistribution layer by the protection layer and is accessibly exposed by the protection layer.

公开(公告)号：US20170345731A1

公开(公告)日：2017-11-30

申请号：US15235106

申请日：2016-08-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yung-Ping Chiang ,  Chao-Wen Shih ,  Shou-Zen Chang ,  Albert Wan ,  Yu-Sheng Hsieh

IPC分类号： H01L23/31 ,  H01L23/528 ,  H01Q9/04 ,  H01L23/00 ,  H01L21/768 ,  H01L23/48 ,  H01L23/66

CPC分类号： H01L23/3107 ,  H01L21/568 ,  H01L21/768 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/528 ,  H01L23/66 ,  H01L24/14 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01Q1/2283 ,  H01Q9/04 ,  H01Q21/065

摘要： Sensor packages and manufacturing methods thereof are disclosed. One of the sensor packages includes a semiconductor chip and a redistribution layer structure. The semiconductor chip has a sensing surface. The redistribution layer structure is arranged to form an antenna transmitter structure aside the semiconductor chip and an antenna receiver structure over the sensing surface of the semiconductor chip.

公开(公告)号：US20200058607A1

公开(公告)日：2020-02-20

申请号：US16661972

申请日：2019-10-23

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Albert Wan ,  Chao-Wen Shih ,  Shou-Zen Chang ,  Nan-Chin Chuang

IPC分类号： H01L23/66 ,  H01L23/31 ,  H01Q9/30 ,  H01Q1/40 ,  H01Q1/22 ,  H01L21/683 ,  H01L21/56 ,  H01L23/00 ,  H01L23/60 ,  H01L23/48

摘要： A package structure include a ground plate, a semiconductor die, a molding compound, and an antenna element. The semiconductor die is located over the ground plate. The molding compound is located over the semiconductor die. The antenna element is located in the molding compound and overlaps with the ground plate along a stacking direction of the ground plate, the semiconductor die and the molding compound. The antenna element has a first side levelled with a first surface of the molding compound, and the ground plate is located between the semiconductor die and the antenna element.

公开(公告)号：US10475757B2

公开(公告)日：2019-11-12

申请号：US16252728

申请日：2019-01-21

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Albert Wan ,  Chao-Wen Shih ,  Shou-Zen Chang ,  Nan-Chin Chuang

IPC分类号： H01L23/66 ,  H01L23/00 ,  H01L23/48 ,  H01L23/31 ,  H01L23/60 ,  H01L21/56 ,  H01L21/683 ,  H01Q1/22 ,  H01Q1/40 ,  H01Q9/30 ,  H01L21/66

摘要： A package structure includes at least one die, an antenna element, and at least one through interlayer via. The antenna element is located on the at least one die. The at least one through interlayer via is located between the antenna element and the at least one die, wherein the antenna element is electrically connected to the at least one die through the at least one through interlayer via.

公开(公告)号：US10381309B2

公开(公告)日：2019-08-13

申请号：US15965980

申请日：2018-04-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chuei-Tang Wang ,  Chung-Hao Tsai ,  Chen-Hua Yu ,  Chun-Lin Lu ,  Chao-Wen Shih ,  Han-Ping Pu ,  Kai-Chiang Wu ,  Albert Wan

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L23/28 ,  H01L25/065 ,  H01L25/00

摘要： A package structure includes a first redistribution layer, a second redistribution layer, at least one semiconductor chip, an insulating encapsulation, a protection layer, and at least one connecting module. The at least one semiconductor chip is located between and electrically connected to the first redistribution layer and the second redistribution layer. The insulating encapsulation encapsulates the at least one semiconductor chip. The protection layer is disposed on and partially covers the first redistribution layer, wherein the first redistribution layer is located between the at least one semiconductor chip and the protection layer. The at least one connecting module connects to the first redistribution layer and is electrically connected to the at least one semiconductor chip through the first redistribution layer, wherein the at least one connecting module comprises a plurality of pins, and the at least one connecting module is mounted onto the first redistribution layer by the protection layer and is accessibly exposed by the protection layer.

公开(公告)号：US20190027449A1

公开(公告)日：2019-01-24

申请号：US15652249

申请日：2017-07-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Albert Wan ,  Chao-Wen Shih ,  Shou-Zen Chang ,  Nan-Chin Chuang

IPC分类号： H01L23/66 ,  H01L23/00 ,  H01L23/48 ,  H01L23/31 ,  H01L23/60 ,  H01L21/56 ,  H01L21/683 ,  H01Q1/22

摘要： A package structure includes at least one die, an antenna element, and at least one through interlayer via. The antenna element is located on the at least one die. The at least one through interlayer via is located between the antenna element and the at least one die, wherein the antenna element is electrically connected to the at least one die through the at least one through interlayer via.