公开(公告)号：US08102043B2

公开(公告)日：2012-01-24

申请号：US13006278

申请日：2011-01-13

申请人： Tae Sung Jeong ,  Hyeog Chan Kwon ,  Youngcheol Kim

发明人： Tae Sung Jeong ,  Hyeog Chan Kwon ,  Youngcheol Kim

IPC分类号： H01L25/07 ,  H01L21/98

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L23/13 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06586 ,  H01L2225/06596 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method for manufacturing a stacked integrated circuit and package system includes: attaching a high temperature resistant layer on a top substrate; mounting a first top integrated circuit on the high temperature resistant layer; mounting a second top integrated circuit on the first top integrated circuit; molding an encapsulant over the first top integrated circuit, the second top integrated circuit and the top substrate; mounting a third top integrated circuit over the first top integrated circuit on a surface opposite the second top integrated circuit; mounting a fourth top integrated circuit on the third top integrated circuit; molding an encapsulant over the third top integrated circuit, the fourth top integrated circuit and the top substrate; forming top electrical connectors on a lower surface of the top substrate; and mounting a bottom package to the top electrical connectors.

摘要翻译： 一种堆叠集成电路和封装系统的制造方法，包括：在顶部基板上安装耐高温层; 将第一顶部集成电路安装在耐高温层上; 在第一顶部集成电路上安装第二顶部集成电路; 在第一顶部集成电路，第二顶部集成电路和顶部衬底上模制密封剂; 在与第二顶部集成电路相对的表面上在第一顶部集成电路上安装第三顶部集成电路; 在第三顶部集成电路上安装第四顶部集成电路; 在第三顶部集成电路，第四顶部集成电路和顶部衬底上成型密封剂; 在顶部基板的下表面上形成顶部电连接器; 并将底部封装安装到顶部电连接器。

公开(公告)号：US20110108976A1

公开(公告)日：2011-05-12

申请号：US13006278

申请日：2011-01-13

申请人： Tae Sung Jeong ,  Hyeog Chan Kwon ,  Youngcheol Kim

发明人： Tae Sung Jeong ,  Hyeog Chan Kwon ,  Youngcheol Kim

IPC分类号： H01L25/07 ,  H01L21/98

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L23/13 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06586 ,  H01L2225/06596 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method for manufacturing a stacked integrated circuit and package system includes: attaching a high temperature resistant layer on a top substrate; mounting a first top integrated circuit on the high temperature resistant layer; mounting a second top integrated circuit on the first top integrated circuit; molding an encapsulant over the first top integrated circuit, the second top integrated circuit and the top substrate; mounting a third top integrated circuit over the first top integrated circuit on a surface opposite the second top integrated circuit; mounting a fourth top integrated circuit on the third top integrated circuit; molding an encapsulant over the third top integrated circuit, the fourth top integrated circuit and the top substrate; forming top electrical connectors on a lower surface of the top substrate; and mounting a bottom package to the top electrical connectors.

摘要翻译： 一种堆叠集成电路和封装系统的制造方法，包括：在顶部基板上安装耐高温层; 将第一顶部集成电路安装在耐高温层上; 在第一顶部集成电路上安装第二顶部集成电路; 在第一顶部集成电路，第二顶部集成电路和顶部衬底上模制密封剂; 在与第二顶部集成电路相对的表面上在第一顶部集成电路上安装第三顶部集成电路; 在第三顶部集成电路上安装第四顶部集成电路; 在第三顶部集成电路，第四顶部集成电路和顶部衬底上成型密封剂; 在顶部基板的下表面上形成顶部电连接器; 并将底部封装安装到顶部电连接器。

公开(公告)号：US07875966B2

公开(公告)日：2011-01-25

申请号：US11255740

申请日：2005-10-21

申请人： Tae Sung Jeong ,  Hyeog Chan Kwon ,  Youngcheol Kim

发明人： Tae Sung Jeong ,  Hyeog Chan Kwon ,  Youngcheol Kim

IPC分类号： H01L23/02

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L23/13 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06586 ,  H01L2225/06596 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2924/00

摘要： A stacked integrated circuit and package system including attaching a first top integrated circuit over an upper surface of a top substrate, attaching a second top integrated circuit over a lower surface of the top substrate, forming top electrical connectors on the lower surface of the top substrate, and connecting a bottom package to the top electrical connectors.

摘要翻译： 一种堆叠集成电路和封装系统，包括在顶部衬底的上表面上附接第一顶部集成电路，将第二顶部集成电路附接在顶部衬底的下表面上，在顶部衬底的下表面上形成顶部电连接器 ，并将底部封装连接到顶部电连接器。

公开(公告)号：US08067831B2

公开(公告)日：2011-11-29

申请号：US11162629

申请日：2005-09-16

申请人： Hyeog Chan Kwon ,  Tae Sung Jeong ,  Jae Han Chung ,  Taeg Ki Lim ,  Jong Wook Ju

发明人： Hyeog Chan Kwon ,  Tae Sung Jeong ,  Jae Han Chung ,  Taeg Ki Lim ,  Jong Wook Ju

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/24 ,  H01L24/97 ,  H01L25/03 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16238 ,  H01L2224/24226 ,  H01L2224/274 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48229 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2224/83 ,  H01L2224/82

摘要： An integrated circuit package system is provided including forming a first substrate, mounting a first integrated circuit to the first substrate, and forming first planar interconnects in contact with the first integrated circuit and electrically connecting the first integrated circuit to the first substrate.

摘要翻译： 提供一种集成电路封装系统，包括形成第一基板，将第一集成电路安装到第一基板，以及形成与第一集成电路接触的第一平面互连并将第一集成电路电连接到第一基板。

公开(公告)号：US20070063331A1

公开(公告)日：2007-03-22

申请号：US11162629

申请日：2005-09-16

申请人： Hyeog Chan Kwon ,  Tae Sung Jeong ,  Jae Han Chung ,  Taeg Ki Lim ,  Jong Wook Ju

发明人： Hyeog Chan Kwon ,  Tae Sung Jeong ,  Jae Han Chung ,  Taeg Ki Lim ,  Jong Wook Ju

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/24 ,  H01L24/97 ,  H01L25/03 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16238 ,  H01L2224/24226 ,  H01L2224/274 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48229 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2224/83 ,  H01L2224/82

摘要： An integrated circuit package system is provided including forming a first substrate, mounting a first integrated circuit to the first substrate, and forming first planar interconnects in contact with the first integrated circuit and electrically connecting the first integrated circuit to the first substrate.

摘要翻译： 提供一种集成电路封装系统，包括形成第一基板，将第一集成电路安装到第一基板，以及形成与第一集成电路接触的第一平面互连并将第一集成电路电连接到第一基板。

公开(公告)号：US08780572B2

公开(公告)日：2014-07-15

申请号：US12923720

申请日：2010-10-05

申请人： Doo Hwan Lee ,  Tae Sung Jeong

发明人： Doo Hwan Lee ,  Tae Sung Jeong

IPC分类号： H05K1/18

CPC分类号： H05K1/185 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K2201/10674 ,  H05K2203/0191 ,  H05K2203/1469 ,  Y10T29/4913 ,  H01L2924/00

摘要： A printed circuit board that include: an electronic component having a plating electrode pad having a predetermined thickness; an insulating resin layer that exposes a lower surface of the electrode pad, receives the electronic component, and embodies the electronic component so that the center of the base body forming the electronic component is positioned at the center of the insulating resin layer; and circuit layers that include a circuit pattern disposed on the electrode pad, form inter-layer connection, and are disposed on both surfaces of the insulating resin layer, respectively, the plating electrode pad having a thickness that conforms to a thickness from an upper surface of the electronic component to an upper surface of the insulating resin.

摘要翻译： 一种印刷电路板，包括：具有预定厚度的电镀电极垫的电子部件; 暴露电极焊盘的下表面的绝缘树脂层接收电子部件，并且实施电子部件，使得形成电子部件的基体的中心位于绝缘树脂层的中心; 以及电路层，其包括设置在电极焊盘上的电路图案，形成层间连接，并且分别设置在绝缘树脂层的两个表面上，电镀电极焊盘的厚度与上表面的厚度一致 的绝缘树脂的上表面。

公开(公告)号：US20110290546A1

公开(公告)日：2011-12-01

申请号：US12923720

申请日：2010-10-05

申请人： Doo Hwan Lee ,  Tae Sung Jeong

发明人： Doo Hwan Lee ,  Tae Sung Jeong

IPC分类号： H05K1/16 ,  H05K3/30

CPC分类号： H05K1/185 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K2201/10674 ,  H05K2203/0191 ,  H05K2203/1469 ,  Y10T29/4913 ,  H01L2924/00

摘要： Disclosed herein are a printed circuit board having an electronic component and a manufacturing method thereof. The printed circuit board having an electronic component may include: an electronic component having a plating electrode pad having a predetermined thickness; an insulating resin layer that exposes a lower surface of the electrode pad, receives the electronic component, and embodies the electronic component so that the center of the base body forming the electronic component is positioned at the center of the insulating resin layer; and circuit layers that include a circuit pattern disposed on the electrode pad, form inter-layer connection, and are disposed on both surfaces of the insulating resin layer, respectively.

摘要翻译： 这里公开了具有电子部件的印刷电路板及其制造方法。 具有电子部件的印刷电路板可以包括：具有预定厚度的电镀焊盘的电子部件; 暴露电极焊盘的下表面的绝缘树脂层接收电子部件，并且实施电子部件，使得形成电子部件的基体的中心位于绝缘树脂层的中心; 以及电路层，其包括设置在电极焊盘上的电路图案，形成层间连接，并且分别设置在绝缘树脂层的两个表面上。

公开(公告)号：US08893380B2

公开(公告)日：2014-11-25

申请号：US12320492

申请日：2009-01-27

申请人： Hong Won Kim ,  Sung Yi ,  Tae Sung Jeong ,  Joon Seok Kang

发明人： Hong Won Kim ,  Sung Yi ,  Tae Sung Jeong ,  Joon Seok Kang

IPC分类号： H05K3/30 ,  H01L23/00 ,  H05K1/18 ,  H01L21/683 ,  H05K3/42

CPC分类号： H05K1/185 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/18 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/18 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01078 ,  H05K3/426 ,  H05K2201/10515 ,  H05K2201/10674 ,  H05K2203/1461 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49165

摘要： The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof and provides a chip embedded printed circuit board including: an insulating layer having vias formed therethrough; a first chip and a second chip embedded in the insulating layer and having pads, which are respectively exposed to upper and lower surfaces of the insulating layer, on one surfaces thereof; an upper pattern formed on the upper surface of the insulating layer to be connected to the pads of the first chip and the vias; and a lower pattern formed on the lower surface of the insulating layer to be connected to the pads of the second chip and the vias. Also, the present invention provides a manufacturing method of a chip embedded printed circuit board.

摘要翻译： 芯片嵌入式印刷电路板及其制造方法技术领域本发明涉及一种芯片嵌入式印刷电路板及其制造方法，其特征在于，提供一种芯片嵌入式印刷电路基板， 嵌入绝缘层中的第一芯片和第二芯片，并且在其一个表面上分别暴露于绝缘层的上表面和下表面的焊盘; 形成在绝缘层的上表面上以连接到第一芯片的焊盘和通孔的上部图案; 以及形成在绝缘层的下表面上以连接到第二芯片的焊盘和通孔的下图案。 另外，本发明提供一种嵌入式芯片的印刷电路板的制造方法。

公开(公告)号：US20070241441A1

公开(公告)日：2007-10-18

申请号：US11379018

申请日：2006-04-17

申请人： Sungwon Choi ,  Tae Sung Jeong

发明人： Sungwon Choi ,  Tae Sung Jeong

IPC分类号： H01L23/02

CPC分类号： H01L25/105 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A multichip package system is provided forming a first substrate having a first side, a second side, and a first opening, connecting a first integrated circuit die to the first substrate through the first opening, connecting a second integrated circuit die on the first substrate, and encapsulating the first integrated die and second integrated circuit die on the first substrate.

摘要翻译： 提供了一种多芯片封装系统，其形成具有第一侧面，第二侧面和第一开口的第一基板，通过第一开口将第一集成电路管芯连接到第一基板，将第二集成电路管芯连接在第一基板上， 以及将所述第一集成管芯和第二集成电路管芯封装在所述第一衬底上。

公开(公告)号：US08692391B2

公开(公告)日：2014-04-08

申请号：US12972310

申请日：2010-12-17

申请人： Tae Sung Jeong ,  Doo Hwan Lee ,  Seung Eun Lee

发明人： Tae Sung Jeong ,  Doo Hwan Lee ,  Seung Eun Lee

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H05K1/18

CPC分类号： H01L24/11 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/2919 ,  H01L2224/32155 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/83001 ,  H01L2224/838 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Disclosed herein are an embedded ball grid array substrate and a manufacturing method thereof. The embedded ball grid array includes: a core layer having a cavity therein; a semiconductor device embedded in the cavity of the core layer; a first circuit layer having a circuit pattern including a wire bonding pad formed thereon; a second circuit layer having a circuit pattern including a solder ball pattern formed thereon; and a wire electrically connecting the semiconductor device to the wire bonding pad.

摘要翻译： 本文公开了嵌入式球栅阵列基板及其制造方法。 嵌入式球栅阵列包括：其中具有空腔的芯层; 嵌入在芯层的空腔中的半导体器件; 第一电路层，具有包括在其上形成的引线接合焊盘的电路图案; 第二电路层，其具有包括形成在其上的焊球图案的电路图案; 以及将半导体器件电连接到引线接合焊盘的线。