公开(公告)号：US20240186320A1

公开(公告)日：2024-06-06

申请号：US18441082

申请日：2024-02-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yi-Huan Chen ,  Chien-Chih Chou ,  Ta-Wei Lin ,  Hsiao-Chin Tuan ,  Alexander Kalnitsky ,  Kong-Beng Thei ,  Shi-Chuang Hsiao ,  Yu-Hong Kuo

IPC分类号： H01L27/088 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L27/088 ,  H01L29/4236 ,  H01L29/42364 ,  H01L29/6653 ,  H01L29/66621 ,  H01L29/7836

摘要： In some embodiments, the present disclosure relates to a semiconductor device comprising a source and drain region arranged within a substrate. A conductive gate is disposed over a doped region of the substrate. A gate dielectric layer is disposed between the source region and the drain region and separates the conductive gate from the doped region. A bottommost surface of the gate dielectric layer is below a topmost surface of the substrate. First and second sidewall spacers are arranged along first and second sides of the conductive gate, respectively. An inner portion of the first sidewall spacer and an inner portion of the second sidewall spacer respectively cover a first and second top surface of the gate dielectric layer. A drain extension region and a source extension region respectively separate the drain region and the source region from the gate dielectric layer.

公开(公告)号：US11810973B2

公开(公告)日：2023-11-07

申请号：US17321216

申请日：2021-05-14

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Yi-Huan Chen ,  Chien-Chih Chou ,  Szu-Hsien Liu ,  Kong-Beng Thei

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/06

CPC分类号： H01L29/7813 ,  H01L29/0646 ,  H01L29/66734

摘要： A semiconductor structure and a method for forming a semiconductor structure are provided. The semiconductor structure includes a substrate; a doped region within the substrate; a pair of source/drain regions extending along a first direction on opposite sides of the doped region; a gate electrode disposed in the doped region, wherein the gate electrode has a plurality of first segments extending in parallel along the first direction; and a protection structure over the substrate and at least partially overlaps the gate electrode.

公开(公告)号：US11508845B2

公开(公告)日：2022-11-22

申请号：US17028796

申请日：2020-09-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Chen-Liang Chu ,  Ta-Yuan Kung ,  Ker-Hsiao Huo ,  Yi-Huan Chen

IPC分类号： H01L29/78 ,  H01L29/10 ,  H01L23/522 ,  H01L29/06 ,  H01L29/66

摘要： A semiconductor structure is disclosed. The semiconductor structure includes: a substrate of a first conductivity; a first region of the first conductivity formed in the substrate; a second region of the first conductivity formed in the first region, wherein the second region has a higher doping density than the first region; a source region of a second conductivity formed in the second region; a drain region of the second conductivity formed in the substrate; a pickup region of the first conductivity formed in the second region and adjacent to the source region; and a resist protective oxide (RPO) layer formed on a top surface of the second region. An associated fabricating method is also disclosed.

公开(公告)号：US11417649B2

公开(公告)日：2022-08-16

申请号：US16205797

申请日：2018-11-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Yi-Sheng Chen ,  Kong-Beng Thei ,  Fu-Jier Fan ,  Jung-Hui Kao ,  Yi-Huan Chen ,  Kau-Chu Lin

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L23/528

摘要： A semiconductor device includes a transistor. The transistor includes an active region in a substrate, a patterned conductive layer being a portion of an interconnection layer for routing, and an insulating layer extending over the substrate and configured to insulate the active region from the patterned conductive layer. The patterned conductive layer and the insulating layer serve as a gate of the transistor.

公开(公告)号：US10937785B2

公开(公告)日：2021-03-02

申请号：US15061596

申请日：2016-03-04

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Yi-Sheng Chen ,  Kong-Beng Thei ,  Fu-Jier Fan ,  Jung-Hui Kao ,  Yi-Huan Chen ,  Kau-Chu Lin

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L23/528

摘要： A semiconductor device includes a transistor. The transistor includes an active region in a substrate, a patterned conductive layer being a portion of an interconnection layer for routing, and an insulating layer extending over the substrate and configured to insulate the active region from the patterned conductive layer. The patterned conductive layer and the insulating layer serve as a gate of the transistor.

公开(公告)号：US20230260994A1

公开(公告)日：2023-08-17

申请号：US17674084

申请日：2022-02-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Chang Jong ,  Yi-Huan Chen ,  Chien-Chih Chou ,  Tsung-Chieh Tsai ,  Szu-Hsien Liu ,  Huan-Chih Yuan ,  Jhu-Min Song

IPC分类号： H01L27/088 ,  H01L21/8234

CPC分类号： H01L27/088 ,  H01L21/823456 ,  H01L21/823418

摘要： Some embodiments relate to an integrated chip structure. The integrated chip structure includes a substrate having a first device region and a second device region. A plurality of first transistor devices are disposed in the first device region and respectively include epitaxial source/drain regions disposed on opposing sides of a first gate structure. The epitaxial source/drain regions have an epitaxial material. A plurality of second transistor devices are disposed in the second device region and respectively include implanted source/drain regions disposed on opposing sides of a second gate structure. A dummy region includes one or more dummy structures. The one or more dummy structures have dummy epitaxial regions including the epitaxial material.

公开(公告)号：US12021140B2

公开(公告)日：2024-06-25

申请号：US18308897

申请日：2023-04-28

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Yi-Huan Chen ,  Chien-Chih Chou ,  Szu-Hsien Liu ,  Kong-Beng Thei ,  Huan-Chih Yuan ,  Jhu-Min Song

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/7813 ,  H01L29/0649 ,  H01L29/4236 ,  H01L29/66734

摘要： A semiconductor structure and a method for forming a semiconductor structure are provided. The semiconductor structure includes a substrate; a gate electrode disposed within the substrate; a gate dielectric layer disposed within the substrate and surrounding the gate electrode; a plurality of first protection structures disposed over the gate electrode; a second protection structure disposed over the gate dielectric layer and contacting the gate dielectric layer; and a pair of source/drain regions on opposing sides of the gate dielectric layer.

公开(公告)号：US20240088154A1

公开(公告)日：2024-03-14

申请号：US18515912

申请日：2023-11-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yi-Huan Chen ,  Chien-Chih Chou ,  Alexander Kalnitsky ,  Kong-Beng Thei ,  Ming Chyi Liu ,  Shih-Chung Hsiao ,  Jhih-Bin Chen

IPC分类号： H01L27/092 ,  H01L21/28 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/51

CPC分类号： H01L27/0922 ,  H01L21/28008 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/517 ,  H01P1/15

摘要： The present disclosure relates to an integrated circuit (IC) that includes a boundary region defined between a low voltage region and a high voltage region, and a method of formation. In some embodiments, the integrated circuit comprises an isolation structure disposed in the boundary region of the substrate. A first polysilicon component is disposed directly on an upper surface of the substrate alongside the isolation structure. A boundary dielectric layer is disposed on the isolation structure. A second polysilicon component is disposed on the sacrifice dielectric layer.

公开(公告)号：US11855091B2

公开(公告)日：2023-12-26

申请号：US17867771

申请日：2022-07-19

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yi-Huan Chen ,  Chien-Chih Chou ,  Alexander Kalnitsky ,  Kong-Beng Thei ,  Ming Chyi Liu ,  Shih-Chung Hsiao ,  Jhih-Bin Chen

IPC分类号： H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L21/28 ,  H01L29/51 ,  H01P1/15 ,  H01L23/48

CPC分类号： H01L27/0922 ,  H01L21/28008 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/517 ,  H01L23/481 ,  H01P1/15

摘要： The present disclosure relates to an integrated circuit (IC) that includes a boundary region defined between a low voltage region and a high voltage region, and a method of formation. In some embodiments, the integrated circuit comprises an isolation structure disposed in the boundary region of the substrate. A first polysilicon component is disposed over the substrate alongside the isolation structure. A boundary dielectric layer is disposed on the isolation structure. A second polysilicon component is disposed on the sacrifice dielectric layer.

公开(公告)号：US20220367655A1

公开(公告)日：2022-11-17

申请号：US17874486

申请日：2022-07-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Liang Chu ,  Chien-Chih Chou ,  Chih-Chang Cheng ,  Yi-Huan Chen ,  Kong-Beng Thei ,  Ming-Ta Lei ,  Ruey-Hsin Liu ,  Ta-Yuan Kung

IPC分类号： H01L29/423 ,  H01L29/06 ,  H01L29/08 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78 ,  H01L21/28 ,  H01L21/285 ,  H01L21/762 ,  H01L29/45

摘要： A method to form a transistor device with a recessed gate structure is provided. In one embodiment, a gate structure is formed overlying a device region and an isolation structure. The gate structure separates a device doping well along a first direction with a pair of recess regions disposed on opposite sides of the device region in a second direction perpendicular to the first direction. A pair of source/drain regions in is formed the device region on opposite sides of the gate structure. A sidewall spacer is formed extending along sidewalls of the gate structure, where a top surface of the sidewall spacer is substantially flush with the top surface of the gate structure. A resistive protection layer is then formed on the sidewall spacer and covering the pair of recess regions.