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公开(公告)号：US20170154881A1
公开(公告)日：2017-06-01
申请号：US14954416
申请日：2015-11-30
发明人： TUNG-LIANG SHAO , CHIH-HANG TUNG , CHEN-HUA YU
IPC分类号： H01L25/18 , H01L21/78 , H01L21/768 , H01L25/065 , H01L23/00 , H01L21/02 , H01L25/00 , H01L21/683 , H01L23/522
CPC分类号： H01L25/18 , H01L21/02282 , H01L21/6835 , H01L21/76802 , H01L21/76877 , H01L21/76898 , H01L21/78 , H01L23/5226 , H01L24/11 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L2221/68327 , H01L2224/0401 , H01L2225/06541 , H01L2225/06548
摘要： The present disclosure relates to a semiconductor device and method of manufacturing the same. The method for manufacturing a semiconductor device includes: attaching a carrier wafer to a front side of a top die wafer; thinning a back side of the top die wafer, the back side of the top die wafer being opposite to the front side the top die wafer; singulating the carrier wafer and the top die wafer whereby singulated dies attached to singulated carrier dies are formed; and bonding back side of each of the singulated dies to a front side of a bottom die wafer.
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2.发明公开公开(公告)号：US20240055377A1
公开(公告)日：2024-02-15
申请号：US18495789
申请日：2023-10-27
IPC分类号： H01L23/00
摘要： The present disclosure provides a method of processing a semiconductor structure. The method includes: placing a first semiconductor structure inside a semiconductor processing apparatus; supplying a solution, wherein the solution is directed toward a surface of the first semiconductor structure, and the solution includes a solvent and a resist; rotating the first semiconductor structure to spread the solution over the surface of the first semiconductor structure; forming a resist layer on the surface of the first semiconductor structure using the resist in the solution; and removing a portion of the solvent from the solution by an exhaust fan disposed adjacent to a periphery of the first semiconductor structure.
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公开(公告)号：US20210082849A1
公开(公告)日：2021-03-18
申请号：US17107674
申请日：2020-11-30
IPC分类号： H01L23/00 , H01L21/78 , H01L21/268 , H01L23/31 , H01L21/56 , H01L21/784
摘要： A semiconductor device includes a substrate includes a first layer and a second layer over the first layer, a bump disposed over the second layer, a molding disposed over the second layer and surrounding the bump, and a retainer disposed over the second layer, wherein the retainer is disposed between the molding and a periphery of the substrate. Further, a method of manufacturing a semiconductor device includes providing a substrate, disposing several bumps on the substrate, disposing a retainer on the substrate and surrounding the bumps, and disposing a molding between the bumps and the retainer.
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公开(公告)号：US20190115312A1
公开(公告)日：2019-04-18
申请号：US16229412
申请日：2018-12-21
IPC分类号： H01L23/00
摘要： Present disclosure provides a semiconductor structure, including a substrate, a pad on the substrate, a conductive layer electrically coupled to the pad at one end, a metal bump including a top surface and a sidewall, a solder bump on the top surface of the metal bump, a dielectric layer surrounding the sidewall of the metal bump and having a top surface, and the top surface of the metal bump entirely protruding the top surface of the dielectric layer, and a polymer layer on the top surface of the dielectric layer, the polymer layer being spaced from both the sidewall of the metal bump and a nearest outer edge of the solder bump with a gap. A method for fabricating a semiconductor device is also provided.
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公开(公告)号：US20150137350A1
公开(公告)日：2015-05-21
申请号：US14082849
申请日：2013-11-18
IPC分类号： H01L23/00
CPC分类号： H01L24/05 , H01L21/563 , H01L23/3114 , H01L23/3157 , H01L24/03 , H01L24/04 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/73 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/0348 , H01L2224/0401 , H01L2224/05008 , H01L2224/05009 , H01L2224/05022 , H01L2224/05111 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05555 , H01L2224/05559 , H01L2224/05569 , H01L2224/05572 , H01L2224/05573 , H01L2224/0558 , H01L2224/05611 , H01L2224/05616 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/06051 , H01L2224/0615 , H01L2224/06154 , H01L2224/10126 , H01L2224/11334 , H01L2224/1134 , H01L2224/1191 , H01L2224/13021 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/73203 , H01L2924/01322 , H01L2924/12042 , H01L2924/3512 , H01L2924/00 , H01L2924/014 , H01L2924/00014 , H01L2924/00012 , H01L2924/01023
摘要： A semiconductor structure includes an oval-shaped pad and a dielectric layer. The oval-shaped pad is on a substrate and includes a major axis corresponding to the largest distance of the oval-shaped pad. The major axis is toward a geometric center of the substrate. The dielectric layer covers the substrate and surrounds the oval-shaped pad.
摘要翻译： 半导体结构包括椭圆形焊盘和电介质层。 椭圆形垫在衬底上并且包括对应于椭圆形垫的最大距离的长轴。 主轴线朝向基板的几何中心。 电介质层覆盖基板并且围绕椭圆形垫。
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公开(公告)号：US20180331059A1
公开(公告)日：2018-11-15
申请号：US16042317
申请日：2018-07-23
IPC分类号： H01L23/00 , H01L21/56 , H01L21/78 , H01L21/784 , H01L21/268 , H01L23/31
CPC分类号： H01L24/11 , H01L21/268 , H01L21/561 , H01L21/78 , H01L21/784 , H01L23/3114 , H01L23/3157 , H01L23/3192 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/10 , H01L24/13 , H01L24/14 , H01L24/94 , H01L2224/02381 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/0401 , H01L2224/05548 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/10126 , H01L2224/10145 , H01L2224/11013 , H01L2224/11334 , H01L2224/1182 , H01L2224/13014 , H01L2224/13016 , H01L2224/13023 , H01L2224/13024 , H01L2224/13027 , H01L2224/13111 , H01L2224/94 , H01L2924/12042 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/01023 , H01L2924/014 , H01L2924/00014 , H01L2224/03 , H01L2924/01047 , H01L2924/01029
摘要： A semiconductor device includes a substrate includes a first layer and a second layer over the first layer, a bump disposed over the second layer, a molding disposed over the second layer and surrounding the bump, and a retainer disposed over the second layer, wherein the retainer is disposed between the molding and a periphery of the substrate. Further, a method of manufacturing a semiconductor device includes providing a substrate, disposing several bumps on the substrate, disposing a retainer on the substrate and surrounding the bumps, and disposing a molding between the bumps and the retainer.
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公开(公告)号：US20180151472A1
公开(公告)日：2018-05-31
申请号：US15434838
申请日：2017-02-16
发明人： TSUNG-YU CHEN , WENSEN HUNG , HUNG-CHI LI , CHENG-CHIEH HSIEH , TUNG-LIANG SHAO , CHIH-HANG TUNG
IPC分类号： H01L23/373 , H01L23/04 , H01L23/367 , H01L21/687
CPC分类号： H01L23/04 , H01L23/367 , H01L23/3731 , H01L23/3736 , H01L23/562
摘要： A semiconductor structure includes a die including a surface, a lid disposed over the surface of the die, and a thermally conductive material disposed between the die and the lid, wherein the lid includes a protrusion protruded towards the surface of the die and the thermally conductive material surrounds the protrusion. Also, a method of manufacturing a semiconductor structure includes providing a die including a surface, providing a lid, removing a portion of the lid to form a protrusion, disposing a thermally conductive material between the surface of the die and the lid, wherein the protrusion of the lid is surrounded by the thermally conductive material. Further, an apparatus for manufacturing a semiconductor structure and a method of manufacturing a semiconductor structure by the apparatus are disclosed.
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公开(公告)号：US20160372434A1
公开(公告)日：2016-12-22
申请号：US15257573
申请日：2016-09-06
IPC分类号： H01L23/00
CPC分类号： H01L24/11 , H01L21/268 , H01L21/561 , H01L21/78 , H01L21/784 , H01L23/3114 , H01L23/3157 , H01L23/3192 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/10 , H01L24/13 , H01L24/14 , H01L24/94 , H01L2224/02381 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/0401 , H01L2224/05548 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/10126 , H01L2224/10145 , H01L2224/11013 , H01L2224/11334 , H01L2224/1182 , H01L2224/13014 , H01L2224/13016 , H01L2224/13023 , H01L2224/13024 , H01L2224/13027 , H01L2224/13111 , H01L2224/94 , H01L2924/12042 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/01023 , H01L2924/014 , H01L2924/00014 , H01L2224/03 , H01L2924/01047 , H01L2924/01029
摘要： A semiconductor device includes a substrate includes a first layer and a second layer over the first layer, a bump disposed over the second layer, a molding disposed over the second layer and surrounding the bump, and a retainer disposed over the second layer, wherein the retainer is disposed between the molding and a periphery of the substrate. Further, a method of manufacturing a semiconductor device includes providing a substrate, disposing several bumps on the substrate, disposing a retainer on the substrate and surrounding the bumps, and disposing a molding between the bumps and the retainer.
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公开(公告)号：US20210225788A1
公开(公告)日：2021-07-22
申请号：US17224946
申请日：2021-04-07
IPC分类号： H01L23/00
摘要： Present disclosure provides a semiconductor structure and a method for fabricating a semiconductor structure. The semiconductor structure includes a substrate, a conductive layer in the substrate, a conductive bump over the substrate and electrically coupled to the conductive layer, and a dielectric stack, including a polymer layer laterally surrounding the conductive bump and including a portion spaced from a nearest outer edge of the conductive bump with a gap, wherein a first thickness of the polymer layer in a first region is greater than a second thickness of the polymer layer in a second region adjacent to the first region, a first bottom surface of the polymer layer in the first region is leveled with a second bottom surface of the polymer layer in the second region, and a dielectric layer underneath the polymer layer.
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公开(公告)号：US20190393197A1
公开(公告)日：2019-12-26
申请号：US16564835
申请日：2019-09-09
发明人： WEI-HENG LIN , TUNG-LIANG SHAO , CHIH-HANG TUNG , CHEN-HUA YU
IPC分类号： H01L25/065 , H01L23/31 , H01L23/00 , H01L25/00 , H01L21/311 , H01L21/56 , H01L23/66
摘要： The present disclosure provides a semiconductor structure including a first chip having a first dielectric surface, a second chip having a second dielectric surface facing the first dielectric surface and maintaining a distance thereto, and an air gap between the second dielectric surface and the first dielectric surface. The first chip includes a plurality of first conductive lines in proximity to the first dielectric surface and parallel to each other, two adjacent first conductive lines each having a sidewall partially exposed from the first dielectric surface. The present disclosure further provides a method for manufacturing the semiconductor structure described herein.
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