公开(公告)号：US20230012147A1

公开(公告)日：2023-01-12

申请号：US17371245

申请日：2021-07-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hung CHU ,  Ding-Kang SHIH ,  Keng-Chu LIN ,  Pang-Yen TSAI ,  Sung-Li WANG ,  Shuen-Shin LIANG ,  Tsungyu HUNG ,  Hsu-Kai CHANG

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/786 ,  H01L29/06 ,  H01L29/40 ,  H01L21/285

Abstract: The present disclosure describes a method to form a semiconductor device with backside contact structures. The method includes forming a semiconductor device on a first side of a substrate. The semiconductor device includes a source/drain (S/D) region. The method further includes etching a portion of the S/D region on a second side of the substrate to form an opening and forming an epitaxial contact structure on the S/D region in the opening. The second side is opposite to the first side. The epitaxial contact structure includes a first portion in contact with the S/D region in the opening and a second portion on the first portion. A width of the second portion is larger than the first portion.

公开(公告)号：US20220285492A1

公开(公告)日：2022-09-08

申请号：US17192134

申请日：2021-03-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Ting CHEN ,  Chen-Han WANG ,  Keng-Chu LIN ,  Shuen-Shin LIANG ,  Tsu-Hsiu PERNG ,  Tsai-Jung HO ,  Tsung-Han KO ,  Tetsuji UENO ,  Yahru CHENG

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/8234

Abstract: The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.

公开(公告)号：US20220157936A1

公开(公告)日：2022-05-19

申请号：US17097959

申请日：2020-11-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal Abhijith KHADERBAD ,  Dhanyakumar Mahaveer SATHAIYA ,  Huicheng CHANG ,  Ko-Feng CHEN ,  Keng-Chu LIN

IPC: H01L29/06 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8238

Abstract: The present disclosure is directed to a method for the fabrication of isolation structures between source/drain (S/D)) epitaxial structures of stacked transistor structures. The method includes depositing an oxygen-free dielectric material in an opening over a first epitaxial structure, where the oxygen-free dielectric material covers top surfaces of the first epitaxial structure and sidewall surfaces of the opening. The method also includes exposing the oxygen-free dielectric material to an oxidizing process to oxidize the oxygen-free dielectric material so that the oxidizing process does not oxidize a portion of the oxygen-free dielectric material on the first epitaxial structure. Further, etching the oxidized oxygen-free dielectric material and forming a second epitaxial layer on the oxygen-free dielectric material not removed by the etching to substantially the opening.

公开(公告)号：US20210193799A1

公开(公告)日：2021-06-24

申请号：US17100533

申请日：2020-11-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shuen-Shin LIANG ,  Chen-Han WANG ,  Keng-Chu LIN ,  Tetsuji UENO ,  Ting-Ting CHEN

IPC: H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234

Abstract: The present disclosure relates to a semiconductor device including first and second terminals formed on a fin region and a seal layer formed between the first and second terminals. The seal layer includes a silicon carbide material doped with oxygen. The semiconductor device also includes an air gap surrounded by the seal layer, the fin region, and the first and second terminals.

公开(公告)号：US20200273695A1

公开(公告)日：2020-08-27

申请号：US16283109

申请日：2019-02-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal A. KHADERBAD ,  Keng-Chu LIN ,  Shuen-Shin LIANG ,  Sung-Li WANG ,  Yasutoshi OKUNO ,  Yu-Yun PENG

IPC: H01L21/02 ,  H01L21/768

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a dielectric structure on a semiconductor substrate, introducing a first gas on the dielectric structure to form first conductive structures on the dielectric structure, and introducing a second gas on the first conductive structures and the dielectric structure. The second gas is different from the first gas. The method also includes introducing a third gas on the first conductive structures and the dielectric structure to form second conductive structures on the dielectric structure. The first gas and the third gas include the same metal.

公开(公告)号：US20240243009A1

公开(公告)日：2024-07-18

申请号：US18618815

申请日：2024-03-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Sung-Li WANG ,  Shuen-Shin LIANG ,  Yu-Yun PENG ,  Fang-Wei LEE ,  Chia-Hung CHU ,  Mrunal Abhijith KHADERBAD ,  Keng-Chu LIN

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/285 ,  H01L21/306 ,  H01L21/8234 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76816 ,  H01L21/02063 ,  H01L21/02068 ,  H01L21/28562 ,  H01L21/30604 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76856 ,  H01L21/76864 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76897 ,  H01L21/823475 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53252 ,  H01L23/53266

Abstract: A device includes source/drain regions, a gate structure, a source/drain contact, and a tungsten structure. The source/drain regions are over a substrate. The gate structure is between the source/drain regions. The source/drain contact is over one of the source/drain regions. The tungsten structure is over the source/drain contact. The tungsten structure includes a lower portion and an upper portion above the lower portion. The upper portion has opposite sidewalls respectively set back from opposite sidewalls of the lower portion of the tungsten structure.

公开(公告)号：US20230268387A1

公开(公告)日：2023-08-24

申请号：US18311066

申请日：2023-05-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shuen-Shin LIANG ,  Tetsuji UENO ,  Ting-Ting CHEN ,  Chen-Han WANG ,  Keng-Chu LIN

IPC: H01L29/06 ,  H01L21/02 ,  H01L29/78 ,  H01L29/417 ,  H01L29/66 ,  H01L27/088

CPC classification number: H01L29/0653 ,  H01L21/02447 ,  H01L21/02529 ,  H01L29/7851 ,  H01L29/41791 ,  H01L29/66795 ,  H01L27/0886

Abstract: The present disclosure relates to a semiconductor device including first and second terminals formed on a fin region and a seal layer formed between the first and second terminals. The seal layer includes a silicon carbide material doped with oxygen. The semiconductor device also includes an air gap surrounded by the seal layer, the fin region, and the first and second terminals.

公开(公告)号：US20230141093A1

公开(公告)日：2023-05-11

申请号：US18149130

申请日：2023-01-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Han-Yu LIN ,  Jhih-Rong HUANG ,  Yen-Tien TUNG ,  Tzer-Min SHEN ,  Fu-Ting YEN ,  Gary CHAN ,  Keng-Chu LIN ,  Li-Te LIN ,  Pinyen LIN

IPC: H01L21/8234 ,  H01L21/3065

CPC classification number: H01L21/823431 ,  H01L21/3065 ,  H01L21/823418

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a fin structure over a substrate. The fin structure can include a channel layer and a sacrificial layer. The method can further include forming a first recess structure in a first portion of the fin structure, forming a second recess structure in the sacrificial layer of a second portion of the fin structure, forming a dielectric layer in the first and second recess structures, and performing an oxygen-free cyclic etching process to etch the dielectric layer to expose the channel layer of the second portion of the fin structure. The oxygen-free cyclic etching process can include two etching processes to selectively etch the dielectric layer over the channel layer.

公开(公告)号：US20230038822A1

公开(公告)日：2023-02-09

申请号：US17833607

申请日：2022-06-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Han WANG ,  Keng-Chu LIN ,  Tsungyu HUNG

IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/786 ,  H01L29/08 ,  H01L29/775 ,  H01L29/66

Abstract: A semiconductor device with different configurations of contact structures and a method of fabricating the same are disclosed. The method includes forming first and second fin structures on a substrate, forming n- and p-type source/drain (S/D) regions on the first and second fin structures, respectively, forming first and second oxidation stop layers on the n- and p-type S/D regions, respectively, epitaxially growing first and second semiconductor layers on the first and second oxidation stop layers, respectively, converting the first and second semiconductor layers into first and second semiconductor oxide layers, respectively, forming a first silicide-germanide layer on the p-type S/D region, and forming a second silicide-germanide layer on the first silicide-germanide layer and on the n-type S/D region.

公开(公告)号：US20230015572A1

公开(公告)日：2023-01-19

申请号：US17377519

申请日：2021-07-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal Abhijith KHADERBAD ,  Keng-Chu LIN ,  Yu-Yun PENG

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/06 ,  H01L29/786 ,  H01L29/45 ,  H01L29/66 ,  H01L29/40

Abstract: The present disclosure describes a semiconductor device that includes a transistor. The transistor includes a source/drain region that includes a front surface and a back surface opposite to the front surface. The transistor includes a salicide region on the back surface and a channel region in contact with the source/drain region. The channel region has a front surface co-planar with the front surface of the source/drain region. The transistor further includes a gate structure disposed on a front surface of the channel region. The semiconductor device also includes a backside contact structure that includes a conductive contact in contact with the salicide region and a liner layer surrounding the conductive contact.