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    Method and apparatus for providing high availabilty to service groups within a datacenter
    3.
    发明授权
    Method and apparatus for providing high availabilty to service groups within a datacenter 有权
    为数据中心内的服务组提供高可用性的方法和装置

    公开(公告)号：US08489721B1

    公开(公告)日：2013-07-16

    申请号：US12346401

    申请日：2008-12-30

    Applicant: Vrijendra Gokhale ,  Manjiri Chitale ,  Alok Ashok Sontakke ,  Karthik Ramamurthy ,  Sandeep Agarwal

    Inventor： Vrijendra Gokhale ,  Manjiri Chitale ,  Alok Ashok Sontakke ,  Karthik Ramamurthy ,  Sandeep Agarwal

    IPC: G06F15/16 ,  G06F15/173

    CPC classification number: H04L29/14 ,  H04L45/02 ,  H04L45/28

    Abstract: A method and apparatus for providing high availability to service groups within a datacenter is described. In one embodiment, the method includes accessing policy master information regarding a plurality of nodes to identify at least one suitable node of the plurality of nodes for operating a service group, generating network topology information to identify at least one single point of failure amongst the plurality of nodes, processing high availability information regarding at least one computer resource at the at least one suitable node and determining availability indicia of the service group based upon the network topology information and the high availability information.

    Abstract translation: 描述了一种用于向数据中心内的服务组提供高可用性的方法和装置。 在一个实施例中，该方法包括访问关于多个节点的策略主信息，以识别用于操作服务组的多个节点中的至少一个合适的节点，生成网络拓扑信息以识别多个节点中的至少一个单点故障 处理关于所述至少一个合适节点上的至少一个计算机资源的高可用性信息，并且基于所述网络拓扑信息和所述高可用性信息来确定所述服务组的可用性标记。

    Enhanced Storage Device Replacement System And Method
    4.
    发明申请
    Enhanced Storage Device Replacement System And Method 有权
    增强存储设备更换系统和方法

    公开(公告)号：US20120317439A1

    公开(公告)日：2012-12-13

    申请号：US13155554

    申请日：2011-06-08

    Applicant: Vishnu Murty K. ,  Deepu Syam Sreedhar M. ,  Nagendra A.S. ,  Sandeep Agarwal ,  Vaibhav Kumar

    Inventor： Vishnu Murty K. ,  Deepu Syam Sreedhar M. ,  Nagendra A.S. ,  Sandeep Agarwal ,  Vaibhav Kumar

    IPC: G06F11/20

    CPC classification number: G06F11/1092 ,  G06F11/2094

    Abstract: Recovery of a failed storage device of a RAID array to a replacement storage device is improved by initiating recovery before failure of the storage device occurs. If failure occurs before completing the transfer of all information from the failed storage device to the replacement storage device, then the RAID controller identifies untransferred information to recreate the failed storage device at the replacement storage device by re-building only the untransferred information with a parity operation using information stored at the array.

    Abstract translation: 通过在发生存储设备故障之前启动恢复，可以将RAID阵列的故障存储设备恢复到替换存储设备。 如果在完成将所有信息从故障存储设备传输到替换存储设备之前发生故障，则RAID控制器通过仅重新构建具有奇偶校验的未传输信息来识别未传输的信息以重新创建在替换存储设备处的故障存储设备 操作使用存储在数组中的信息。

    Phase error correction circuit for a high speed frequency synthesizer
    5.
    发明授权
    Phase error correction circuit for a high speed frequency synthesizer 有权
    高速频率合成器的相位误差校正电路

    公开(公告)号：US07205798B1

    公开(公告)日：2007-04-17

    申请号：US11045929

    申请日：2005-01-28

    Applicant: Sandeep Agarwal ,  Xiaole Chen

    Inventor： Sandeep Agarwal ,  Xiaole Chen

    IPC: H03B21/00

    CPC classification number: H03L7/0994 ,  G06F1/025 ,  H03L7/081 ,  H03L7/18

    Abstract: Circuits, methods, and apparatus for reducing the phase error in an NCO clock output to reduce the clock jitter. This is particularly beneficial where the frequencies of the NCO output and reference signal are unrelated. One embodiment provides a circuit that corrects the phase of the NCO output in two steps in order to obtain a substantially glitch-free, high-speed operation. During the first step, the output of the NCO is phase shifted to the closest quarter portion of a cycle of a clock signal. A second correction step is then performed by steering a number of currents under the control of at least some of a number of remainder bits from the NCO. The current steering provides a die area efficient, low-noise phase correction. The decoded remainder bits are latched using a feed forward circuit that prevents the device from entering a locked state.

    Abstract translation: 用于减少NCO时钟输出中的相位误差的电路，方法和装置，以减少时钟抖动。 这在NCO输出和参考信号的频率无关的情况下尤其有利。 一个实施例提供了一种电路，其以两个步骤校正NCO输出的相位，以便获得基本上无毛刺的高速操作。 在第一步骤期间，NCO的输出被相移到时钟信号周期的最近四分之一部分。 然后通过在来自NCO的多个剩余位中的至少一些的控制下转向多个电流来执行第二校正步骤。 目前的转向器提供了芯片区域有效的低噪声相位校正。 使用防止设备进入锁定状态的前馈电路来锁定解码的余数位。

    Pixel clock PLL frequency and phase optimization in sampling of video signals for high quality image display
    6.
    发明授权
    Pixel clock PLL frequency and phase optimization in sampling of video signals for high quality image display 有权
    像素时钟PLL频率和相位优化采样视频信号，实现高品质图像显示

    公开(公告)号：US06633288B2

    公开(公告)日：2003-10-14

    申请号：US09396016

    申请日：1999-09-15

    Applicant: Sandeep Agarwal ,  Arun Johary

    Inventor： Sandeep Agarwal ,  Arun Johary

    IPC: G09G500

    CPC classification number: G09G5/008

    Abstract: Pixel clock frequency and optimum sampling phase adjustment is an important requirement in Flat panel display monitors (FPDM) with an analog video interface. This invention proposes a new and more advanced method for frequency and optimum sampling phase determination. It is based on analyzing the content of the image to arrive at an optimum value of phase and frequency by directly optimizing image quality. The method differs from existing methods on two counts. First, no assumptions are needed about the precise value of expected frequency. Second, instead of following a two step approach of first determining frequency and then phase, this invention makes possible a single pass phase-frequency optimization.

    Abstract translation: 像素时钟频率和最佳采样相位调整是具有模拟视频接口的平板显示监视器（FPDM）的重要要求。 本发明提出了一种新的更先进的频率和最佳采样相位确定方法。 它是基于分析图像的内容，通过直接优化图像质量达到相位和频率的最佳值。 该方法与现有方法有两种不同。 首先，不需要有关预期频率的精确值的假设。 第二，不是按照第一次确定频率然后相位的两步法，本发明使单通道相位频率优化成为可能。

    Using location tracking of cluster nodes to avoid single points of failure
    7.
    发明授权
    Using location tracking of cluster nodes to avoid single points of failure 有权
    使用集群节点的位置跟踪来避免单点故障

    公开(公告)号：US09454444B1

    公开(公告)日：2016-09-27

    申请号：US12407237

    申请日：2009-03-19

    Applicant: Sandeep Agarwal ,  Chio Fai Aglaia Kong ,  Karthik Ramamurthy

    Inventor： Sandeep Agarwal ,  Chio Fai Aglaia Kong ,  Karthik Ramamurthy

    IPC: G06F11/20 ,  G06F11/14

    CPC classification number: G06F11/2023 ,  G06F11/1425 ,  G06F11/1484 ,  G06F11/20

    Abstract: Systems and methods are provided to track cluster nodes and provide high availability in a computing system. A computer system includes hosts, a cluster manager, and a cluster database. The cluster database includes entries corresponding to the hosts which identify the physical location of a corresponding host. The cluster manager uses the data to select at least two hosts and assign the selected hosts to a service group for executing an application. The cluster manager selects hosts via an algorithm that determines which hosts are least likely to share a single point of failure. The data includes a hierarchical group of location attributes describing two or more of a host's country, state, city, building, room, enclosure, and radio frequency identifier (RFID). The location-based algorithm identifies a group of selected hosts whose smallest shared location attribute is highest in the hierarchical group. The system updates the data whenever a physical location of a host changes.

    Abstract translation: 提供系统和方法来跟踪集群节点并在计算系统中提供高可用性。 计算机系统包括主机，集群管理器和集群数据库。 集群数据库包括与标识相应主机的物理位置的主机相对应的条目。 集群管理器使用数据来选择至少两台主机，并将选定的主机分配给服务组以执行应用程序。 集群管理器通过一种算法选择主机，该算法确定哪些主机最不可能共享单点故障。 数据包括描述主机的国家，州，城市，建筑物，房间，机箱和射频标识符（RFID）中的两个或多个的位置属性的分层组。 基于位置的算法识别分层组中最小共享位置属性最高的一组选定主机。 只要主机的物理位置发生变化，系统会更新数据。

    Systems and methods for resolving split-brain scenarios in computer clusters
    9.
    发明授权
    Systems and methods for resolving split-brain scenarios in computer clusters 有权
    用于解决计算机集群中的裂脑情景的系统和方法

    公开(公告)号：US08108715B1

    公开(公告)日：2012-01-31

    申请号：US12830285

    申请日：2010-07-02

    Applicant: Sandeep Agarwal

    Inventor： Sandeep Agarwal

    IPC: G06F11/00

    CPC classification number: G06F11/0709 ,  G06F11/0715 ,  G06F11/0793 ,  G06F11/1425

    Abstract: A computer-implemented method for resolving split-brain scenarios in computer clusters may include (1) identifying a plurality of nodes within a computer cluster that are configured to collectively perform at least one task, (2) receiving, from a node within the computer cluster, a failure notification that identifies a link-based communication failure experienced by the node that prevents the nodes within the computer cluster from collectively performing the task, and, upon receiving the failure notification, (3) immediately prompting each node within the computer cluster to participate in an arbitration event in order to identify a subset of the nodes that is to assume responsibility for performing the task subsequent to the link-based communication failure. Various other methods, systems, and computer-readable media are also disclosed.

    Abstract translation: 用于解决计算机集群中的裂脑情景的计算机实现的方法可以包括（1）识别计算机集群内被配置为共同执行至少一个任务的多个节点，（2）从计算机集群内的节点接收 集群，故障通知，其识别节点所经历的基于链路的通信故障，其阻止计算机集群内的各节点共同执行任务，并且在接收到故障通知时，（3）立即提示计算机集群内的每个节点 以参与仲裁事件，以便识别在基于链路的通信故障之后承担执行任务的责任的节点的子集。 还公开了各种其它方法，系统和计算机可读介质。

    Hysteretic power-supply controller with adjustable switching frequency, and related power supply, system, and method
    10.
    发明申请
    Hysteretic power-supply controller with adjustable switching frequency, and related power supply, system, and method 有权
    具有可调开关频率的迟滞电源控制器及相关电源，系统和方法

    公开(公告)号：US20080129264A1

    公开(公告)日：2008-06-05

    申请号：US11897681

    申请日：2007-08-31

    Applicant: Zaki Moussaoui ,  Sandeep Agarwal ,  Javant Vivrekar

    Inventor： Zaki Moussaoui ,  Sandeep Agarwal ,  Javant Vivrekar

    IPC: G05F1/613

    CPC classification number: H02M3/156

    Abstract: An embodiment of a hysteretic power-supply controller includes a signal generator, frequency adjuster, and signal combiner. The signal generator is operable to generate a switching signal having a first level in response to a control signal being greater than a first reference value and having a second level in response to the control signal being less than a second reference value, the switching signal having an actual frequency and being operable to drive a switching stage that generates a regulated output signal. The frequency adjuster is operable to generate a frequency-adjust signal that is related to a difference between the actual frequency and a desired frequency. And the signal combiner is operable to generate the control signal from the frequency-adjust signal and the regulated output signal. Such a hysteretic power-supply controller may allow one to set the switching frequency to a desired value independently of the parameters of the power supply.

    Abstract translation: 滞后电源控制器的实施例包括信号发生器，频率调节器和信号组合器。 所述信号发生器可操作以响应于大于第一参考值的控制信号产生具有第一电平的开关信号，并响应于所述控制信号小于第二参考值而具有第二电平，所述开关信号具有 实际频率并且可操作以驱动产生调节输出信号的开关级。 频率调节器可操作以产生与实际频率和期望频率之间的差异相关的频率调整信号。 并且信号组合器可操作以从频率调节信号和调节输出信号产生控制信号。 这种滞后电源控制器可以允许将开关频率设置为独立于电源的参数的期望值。

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