公开(公告)号：US20250124969A1

公开(公告)日：2025-04-17

申请号：US18669633

申请日：2024-05-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changyoung Lee ,  Yeongwoo Kang ,  Yongjun Kim

IPC: G11C11/4091 ,  G11C11/408

Abstract: Memory devices and methods of operating thereof. A memory device may include a plurality of memory cells each including a cell transistor having a back gate that is shared with a cell transistor of an adjacent memory cell through a back gate line, a forward gate that is connected to a corresponding word line, and a cell capacitor that is connected to a first electrode of the cell transistor; a sub-word line driver configured to apply a word line driving voltage to a selected word line; a back gate driver configured to change a back gate voltage applied to the back gate line from a first voltage level to a second voltage level during an active period in which the selected word line is enabled; and a sense amplifier configured to sense data through bit lines connected to second electrodes of the cell transistors of the plurality of memory cells.

公开(公告)号：US20220028431A1

公开(公告)日：2022-01-27

申请号：US17356080

申请日：2021-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyungjin Kim ,  Yongjun Kim ,  Yonghun Kim ,  Minsu Ahn ,  Reum Oh ,  Jinyong Choi

IPC: G11C5/06 ,  G11C5/02 ,  H01L25/065 ,  H01L23/538

Abstract: A semiconductor device includes a cell area in which a plurality of memory cells are arranged in an array structure, and a peripheral area in which circuits configured to drive the memory cells are arranged, the peripheral area being next to the cell area. The cell area is divided into a plurality of banks, and the plurality of banks comprise first banks having a base size and second banks having a size of 1/(2*n) (wherein n is an integer greater than or equal to 1) of the base size. The plurality of banks are arranged in a first direction and a second direction perpendicular to the first direction, and the semiconductor device has a shape of a rectangular chip which is elongated in the second direction.

公开(公告)号：US20250031467A1

公开(公告)日：2025-01-23

申请号：US18737207

申请日：2024-06-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sooyoung Kang ,  Doowon Kwon ,  Yongjun Kim ,  Sol Yoon ,  Keunhyoung Park ,  Dongjun Oh

IPC: H01L27/146 ,  H04N25/79

Abstract: An image sensor is described comprising a first, a second, and a third stack mounted together. The first stack includes a first semiconductor substrate with a photoelectric conversion region, a floating diffusion region, and a transmission gate. The photoelectric conversion region absorbs light, and the charges freed by the light absorption are stored in the floating diffusion region prior to being transferred to other circuitry by the transmission gate. The transmission gate comprises an etch stop film on an upper surface and on a sidewall. The second stack, attached to the first stack, includes a second semiconductor substrate in which is located a pixel gate. The pixel gate is electrically connected with the floating diffusion region and further comprises a gate spacer on a sidewall of the pixel gate. The third stack, attached to the second stack, includes a logic transistor.

公开(公告)号：US20240215756A1

公开(公告)日：2024-07-04

申请号：US18608155

申请日：2024-03-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Najeong HAN ,  Sanga Kim ,  Yongjun Kim ,  Namjin Cho ,  Woogyung Cho

IPC: A47J36/32 ,  A23L5/10 ,  H04L12/28

CPC classification number: A47J36/321 ,  A23L5/10 ,  H04L12/2816

Abstract: An electronic apparatus includes: a communication interface configured to perform a communication connection with an external device; a memory storing instructions; and a processor connected to the memory and configured to execute the instructions. The at least one instruction includes instructions to: receive a signal requesting a first cooking operation of a first cooking device for cooking food from a user terminal device while a food cooking image is provided to the user terminal device, in response to receiving the signal requesting the first cooking operation, identify whether a user has the first cooking device based on a list of cooking devices that the user has, and in response to identifying that the user does not have the first cooking device, transmit to the external device a signal for performing a second cooking operation that is capable of replacing the first cooking operation of the first cooking device.

公开(公告)号：US20250031376A1

公开(公告)日：2025-01-23

申请号：US18582722

申请日：2024-02-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junil Lee ,  Yongjun Kim ,  Chanho Kim ,  Sangwan Nam ,  Ryoongbin Lee

IPC: H10B43/40 ,  G11C16/30 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

Abstract: A semiconductor device may include a first semiconductor structure including a substrate, an active region in the substrate, a device isolation region defining the active region, and a capacitor structure on the device isolation region and vertically overlapping the device isolation region. The capacitor structure may include a first electrode structure extending in a first direction and including first capacitor electrodes stacked in the first direction, a second electrode structure including second capacitor electrodes stacked in the first direction, and a first insulating structure between the first electrode structure and the second electrode structure. Each of the first capacitor electrodes and the second capacitor electrodes are alternately arranged and spaced apart from each other in a second direction parallel to an upper surface of the substrate, extend in a third direction perpendicular to the first direction and the second direction, and has a plate shape.

公开(公告)号：US09691769B2

公开(公告)日：2017-06-27

申请号：US14810739

申请日：2015-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongjun Kim ,  Keeshik Park ,  Jungwoo Song ,  Sang-Jun Lee ,  Donggyun Han ,  Jaerok Kahng

IPC: H01L21/02 ,  H01L21/00 ,  H01L27/108 ,  H01L27/11521

CPC classification number: H01L27/10814 ,  H01L27/10817 ,  H01L27/10823 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/11521 ,  H01L27/228

Abstract: A memory device includes a substrate including active areas and isolation areas, trenches in the isolation areas, active patterns in the active areas, the active patterns protruding from the substrate, isolation layers filling the trenches, gate trenches crossing the active patterns and the isolation layers, and gate line stacks filling the gate trenches, a first width of the gate trench in the isolation layer being greater than a second width of the gate trench in the active pattern.

公开(公告)号：US11538506B2

公开(公告)日：2022-12-27

申请号：US17356080

申请日：2021-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyungjin Kim ,  Yongjun Kim ,  Yonghun Kim ,  Minsu Ahn ,  Reum Oh ,  Jinyong Choi

IPC: G11C5/06 ,  G11C5/02 ,  H01L23/538 ,  H01L25/065

Abstract: A semiconductor device includes a cell area in which a plurality of memory cells are arranged in an array structure, and a peripheral area in which circuits configured to drive the memory cells are arranged, the peripheral area being next to the cell area. The cell area is divided into a plurality of banks, and the plurality of banks comprise first banks having a base size and second banks having a size of 1/(2*n) (wherein n is an integer greater than or equal to 1) of the base size. The plurality of banks are arranged in a first direction and a second direction perpendicular to the first direction, and the semiconductor device has a shape of a rectangular chip which is elongated in the second direction.

公开(公告)号：US10559334B2

公开(公告)日：2020-02-11

申请号：US16031408

申请日：2018-07-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunsoo Park ,  Yongjun Kim ,  Chang-Yong Lee

IPC: G11C7/22 ,  G11C7/10 ,  H03M9/00 ,  G11C8/10 ,  G11C8/06

Abstract: A memory device includes a memory cell array storing input data, a clock generator circuit generating first clocks and second clocks using a reference clock, a phase information generator circuit comparing a phase of the reference clock and a phase of at least one of the first clocks and the second clocks and generating phase information as a comparison result, an intermediate data generator circuit serializing a part of input data provided from the memory cell array based on the first clocks to generate first data, serializing a remaining part of the input data to generate second data, and selectively swapping the first data and the second data using the phase information to generate intermediate data, and an output data generator circuit serializing the intermediate data using the second clocks, to output output data through one output data line.