公开(公告)号：US20250048639A1

公开(公告)日：2025-02-06

申请号：US18653301

申请日：2024-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hakseon Kim ,  Kangoh Yun ,  Dongjin Lee ,  Youngrok Kim ,  Ryoongbin Lee ,  Jaeduk Lee

IPC: H10B43/40 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

Abstract: A non-volatile memory device includes a peripheral circuit and a memory cell array that are sequentially stacked. The peripheral circuit includes, a device isolation layer defining an active region within a substrate, a first gate electrode extending in a first horizontal direction on the active region, an insulating pattern in a first recess and a second recess spaced apart in a second horizontal direction within the active region on opposing sides of the first gate electrode, a first low concentration doped region along an outer wall of the first recess, a second low concentration doped region along an outer wall of the second recess, a first source/drain region buried in the first low concentration doped region, and a second source/drain region buried in the second low concentration doped region.

公开(公告)号：US20250031376A1

公开(公告)日：2025-01-23

申请号：US18582722

申请日：2024-02-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junil Lee ,  Yongjun Kim ,  Chanho Kim ,  Sangwan Nam ,  Ryoongbin Lee

IPC: H10B43/40 ,  G11C16/30 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

Abstract: A semiconductor device may include a first semiconductor structure including a substrate, an active region in the substrate, a device isolation region defining the active region, and a capacitor structure on the device isolation region and vertically overlapping the device isolation region. The capacitor structure may include a first electrode structure extending in a first direction and including first capacitor electrodes stacked in the first direction, a second electrode structure including second capacitor electrodes stacked in the first direction, and a first insulating structure between the first electrode structure and the second electrode structure. Each of the first capacitor electrodes and the second capacitor electrodes are alternately arranged and spaced apart from each other in a second direction parallel to an upper surface of the substrate, extend in a third direction perpendicular to the first direction and the second direction, and has a plate shape.