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公开(公告)号:US10964740B2
公开(公告)日:2021-03-30
申请号:US16407870
申请日:2019-05-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinyong Choi , Haemin Lim , Joosung Moon , Ingyu Baek , Seunghan Yoo , Minjung Chung
IPC: H01L27/146
Abstract: An image sensor includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, a photoelectric conversion layer in the semiconductor substrate, transistors on the first surface of the semiconductor substrate, a first interlayer insulation layer on the transistors, a first lower pad electrode and a second lower pad electrode spaced apart from the first lower pad electrode on the first interlayer insulation layer, a mold insulation layer on the first and second lower pad electrodes, first and second lower electrodes in the mold insulation layer, a dielectric layer on the first and second lower electrodes, an upper electrode on the dielectric layer, and an upper pad electrode connected to the upper electrode and including a different conductive material from the first and second lower pad electrodes. The first lower electrodes are on the first lower pad electrode, and the second lower electrodes are on the second lower pad electrode.
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公开(公告)号:US20220028431A1
公开(公告)日:2022-01-27
申请号:US17356080
申请日:2021-06-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyungjin Kim , Yongjun Kim , Yonghun Kim , Minsu Ahn , Reum Oh , Jinyong Choi
IPC: G11C5/06 , G11C5/02 , H01L25/065 , H01L23/538
Abstract: A semiconductor device includes a cell area in which a plurality of memory cells are arranged in an array structure, and a peripheral area in which circuits configured to drive the memory cells are arranged, the peripheral area being next to the cell area. The cell area is divided into a plurality of banks, and the plurality of banks comprise first banks having a base size and second banks having a size of 1/(2*n) (wherein n is an integer greater than or equal to 1) of the base size. The plurality of banks are arranged in a first direction and a second direction perpendicular to the first direction, and the semiconductor device has a shape of a rectangular chip which is elongated in the second direction.
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公开(公告)号:US11829224B2
公开(公告)日:2023-11-28
申请号:US17742175
申请日:2022-05-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dongyeon Park , Youngjae Park , Hyungjin Kim , Reum Oh , Jinyong Choi
IPC: G06F1/00 , G06F1/3225 , G06F1/3296 , G06F1/3234 , G06F1/3203
CPC classification number: G06F1/3225 , G06F1/3275 , G06F1/3296 , G06F1/3203
Abstract: In a method of operating a memory device, a first command to allow the memory device to enter an idle mode is received. A reference time interval is adjusted based on process, voltage and temperature (PVT) variation associated with the memory device. The reference time interval is used to determine a start time point of a power control operation for reducing power consumption of the memory device. A first time interval during which the idle mode is maintained is internally measured based on the first command. The power control operation is performed in response to the first time interval being longer than the reference time interval.
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公开(公告)号:US11665452B2
公开(公告)日:2023-05-30
申请号:US16743222
申请日:2020-01-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ingyu Baek , Hyunchul Kim , Jinyong Choi
IPC: H01L27/00 , H04N25/771 , H01L49/02 , H01L27/146 , H04N25/75
CPC classification number: H04N25/771 , H01L27/1463 , H01L27/14609 , H01L27/14636 , H01L28/60 , H04N25/75
Abstract: An image sensor is provided and includes a photoelectric conversion layer, an integrated circuit layer, and a charge storage layer. The photoelectric conversion layer includes a pixel separation structure defining pixel regions, each including a photoelectric conversion region. The integrated circuit layer read charges from the photoelectric conversion regions. The charge storage layer includes a stacked capacitor for each of the pixel regions. The stacked capacitor includes a lower pad electrode, an intermediate pad electrode, an upper pad electrode, a contact plug connecting the upper pad electrode to the lower pad electrode, a first lower capacitor structure connected between the lower pad electrode and the intermediate pad electrode, and an upper capacitor structure connected between the intermediate pad electrode and the upper pad electrode. The upper capacitor structure is stacked on the lower capacitor structure to partially overlap the lower capacitor structure when viewed in plan view.
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公开(公告)号:US20250069961A1
公开(公告)日:2025-02-27
申请号:US18800813
申请日:2024-08-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinyong Choi , Sooyeol Yang , Jaeeun Lee , Hyuckjoon Kwon , Jinwon Choi , Takuya Futatsuyama
Abstract: A semiconductor multi-layer structure includes a first semiconductor wafer including a plurality of first pads, a second semiconductor wafer including a plurality of second pads combined with the plurality of first pads, and a test circuit configured to apply a first voltage to a reference combination portion in which a preset first reference pad among the plurality of first pads is combined with a preset second reference pad among the plurality of second pads and apply a second voltage to a comparison combination portion in which at least one first pad among the plurality of first pads is combined with at least one second pad among the plurality of second pads, wherein the test circuit compares a voltage distributed based on a resistance ratio of the reference combination portion to the comparison combination portion with a preset reference voltage to determine whether the at least one first pad is aligned with the at least one second pad.
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公开(公告)号:US20240258354A1
公开(公告)日:2024-08-01
申请号:US18242597
申请日:2023-09-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jungsan Kim , Kwansik Kim , Jinyong Choi , Gayoung Kim , Taemin Kim , Yongsoon Park , Ingyu Baek , Seungho Lee
IPC: H01L27/146
CPC classification number: H01L27/14632 , H01L27/14603 , H01L27/14645
Abstract: An image sensor includes a lower insulating film arranged over a substrate and having a non-flat surface that has a concave-convex shape and includes a first surface, which extends in a horizontal direction parallel to a frontside surface of the substrate, and at least one second surface extending from the first surface toward the substrate, a capacitor arranged on the lower insulating film to contact the non-flat surface of the lower insulating film and conformally covering the non-flat surface of the lower insulating film along the contour of the non-flat surface of the lower insulating film, an upper insulating film covering the capacitor and the lower insulating film, and at least one air gap having a side facing the at least one second surface of the lower insulating film in the horizontal direction and having a height defined by the upper insulating film in a vertical direction.
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公开(公告)号:US11538506B2
公开(公告)日:2022-12-27
申请号:US17356080
申请日:2021-06-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyungjin Kim , Yongjun Kim , Yonghun Kim , Minsu Ahn , Reum Oh , Jinyong Choi
IPC: G11C5/06 , G11C5/02 , H01L23/538 , H01L25/065
Abstract: A semiconductor device includes a cell area in which a plurality of memory cells are arranged in an array structure, and a peripheral area in which circuits configured to drive the memory cells are arranged, the peripheral area being next to the cell area. The cell area is divided into a plurality of banks, and the plurality of banks comprise first banks having a base size and second banks having a size of 1/(2*n) (wherein n is an integer greater than or equal to 1) of the base size. The plurality of banks are arranged in a first direction and a second direction perpendicular to the first direction, and the semiconductor device has a shape of a rectangular chip which is elongated in the second direction.
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