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    Variable resistance memory device
    1.
    发明授权
    Variable resistance memory device 有权

    公开(公告)号：US11456419B2

    公开(公告)日：2022-09-27

    申请号：US17144502

    申请日：2021-01-08

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Juhyun Moon ,  Youngju Kwak ,  Seunghan Yoo

    IPC: H01L45/00 ,  H01L27/24 ,  H01L21/768

    Abstract: A variable resistance memory device includes first conductive lines, second conductive lines arranged on the first conductive lines, first cell structures at intersections between the first conductive lines and the second conductive lines, each first cell structure including a switching pattern and a variable resistance pattern, first buried structures filling first trenches between the first conductive lines, and second buried structures filling second trenches between the first cell structures. Each first buried structure includes a first liner pattern covering sidewalls of a corresponding first trench, a first filling pattern being disposed on the first liner pattern and in the corresponding first trench, and a first capping pattern sealing the corresponding first trench. The second buried structures extend in the plurality of second trenches and are connected with first capping patterns of the first buried structures.

    Image sensor
    2.
    发明授权
    Image sensor 有权

    公开(公告)号：US10964740B2

    公开(公告)日：2021-03-30

    申请号：US16407870

    申请日：2019-05-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jinyong Choi ,  Haemin Lim ,  Joosung Moon ,  Ingyu Baek ,  Seunghan Yoo ,  Minjung Chung

    IPC: H01L27/146

    Abstract: An image sensor includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, a photoelectric conversion layer in the semiconductor substrate, transistors on the first surface of the semiconductor substrate, a first interlayer insulation layer on the transistors, a first lower pad electrode and a second lower pad electrode spaced apart from the first lower pad electrode on the first interlayer insulation layer, a mold insulation layer on the first and second lower pad electrodes, first and second lower electrodes in the mold insulation layer, a dielectric layer on the first and second lower electrodes, an upper electrode on the dielectric layer, and an upper pad electrode connected to the upper electrode and including a different conductive material from the first and second lower pad electrodes. The first lower electrodes are on the first lower pad electrode, and the second lower electrodes are on the second lower pad electrode.

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