Electric device including branched signal lines, and electric device including printed circuit board

    公开(公告)号:US12229061B2

    公开(公告)日:2025-02-18

    申请号:US17670962

    申请日:2022-02-14

    Abstract: Disclosed is an electronic device which includes a plurality of memory devices, a memory controller, a first signal line that makes electrical connection between the memory controller and a first branch point, a second signal line that makes electrical connection between the first branch point and a second branch point, a third signal line that makes electrical connection between the first branch point and a third branch point, a fourth signal line that electrically connects the second branch point and the first memory device, a fifth signal line that electrically connects the second branch point and the second memory device, a sixth signal line that electrically connects the third branch point and the third memory device, and a stub that includes a first end electrically connected with at least one of the plurality of signal lines, and a second end being left open-circuit.

    Nonvolatile Memories Having Data Input/Output Switches and Data Storage Devices and Methods Using the Same
    5.
    发明申请
    Nonvolatile Memories Having Data Input/Output Switches and Data Storage Devices and Methods Using the Same 有权
    具有数据输入/输出开关和数据存储设备的非易失性存储器及其使用方法

    公开(公告)号:US20150380090A1

    公开(公告)日:2015-12-31

    申请号:US14736683

    申请日:2015-06-11

    CPC classification number: G11C16/349 G11C16/10

    Abstract: A nonvolatile memory includes a memory cell array including a plurality of memory cells, a pad configured to be connected to a data input/output line, and an input/output circuit configured to receive data to be programmed in the memory cell array and to transmit data read from the memory cell array. The nonvolatile memory further includes a switch configured to couple and decouple the pad and the input/output circuit responsive to a switch control signal and a control circuit configured to generate the switch control signal responsive to a chip enable signal. Data storage devices and methods using such nonvolatile memories are also described.

    Abstract translation: 非易失性存储器包括包括多个存储单元的存储单元阵列,被配置为连接到数据输入/输出线的衬垫以及被配置为接收要在存储器单元阵列中被编程的数据并且发送的输入/输出电路 从存储单元阵列读取的数据。 非易失性存储器还包括开关,其被配置为响应于开关控制信号耦合和去耦合焊盘和输入/输出电路,以及控制电路,被配置为响应芯片使能信号产生开关控制信号。 还描述了使用这种非易失性存储器的数据存储装置和方法。

    STORAGE DEVICES HAVING MULTI DROP STRUCTURE
    7.
    发明公开

    公开(公告)号:US20240127869A1

    公开(公告)日:2024-04-18

    申请号:US18317344

    申请日:2023-05-15

    CPC classification number: G11C7/1039 G11C5/06 G11C5/14

    Abstract: A storage device having a multi drop structure is provided. The storage device comprises a storage controller configured to output a data signal, a first non-volatile memory configured to receive the data signal, a first wiring electrically connected to the storage controller and configured to transfer the data signal, a first termination module including a first impedance element that electrically connects the first wiring to at least one of a power voltage or a ground voltage, a second wiring electrically connected to the first wiring and configured to transfer the data signal to the first non-volatile memory, and a third wiring electrically connected to the first wiring and configured to transfer the data signal to the first termination module.

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