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    Memory system, method of operating the same and storage device using the same
    2.
    发明授权
    Memory system, method of operating the same and storage device using the same 有权

    公开(公告)号：US11829633B2

    公开(公告)日：2023-11-28

    申请号：US17198742

    申请日：2021-03-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jiwoon Park

    IPC: G06F3/00 ,  G06F3/06

    CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

    Abstract: A memory system includes a memory controller and M memory chips. The memory controller generates a first data signal having one of 2M voltage levels different from each other, where M is a natural number greater than or equal to two, and outputs the first data signal through a first channel. The first data signal represents first data including M bits. The M memory chips are commonly connected to the memory controller through the first channel. When the M memory chips have an enabled state, the M memory chips simultaneously receives the first data signal transmitted through the first channel from the memory controller, and simultaneously obtains the M bits included in the first data based on the first data signal. Each of the M memory chips obtains a respective one of the M bits, and operates based on the respective one of the M bits.

    Nonvolatile Memories Having Data Input/Output Switches and Data Storage Devices and Methods Using the Same
    6.
    发明申请
    Nonvolatile Memories Having Data Input/Output Switches and Data Storage Devices and Methods Using the Same 有权
    具有数据输入/输出开关和数据存储设备的非易失性存储器及其使用方法

    公开(公告)号：US20150380090A1

    公开(公告)日：2015-12-31

    申请号：US14736683

    申请日：2015-06-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jiwoon Park ,  Junghee Cho ,  Su-Jin Kim

    IPC: G11C16/08

    CPC classification number: G11C16/349 ,  G11C16/10

    Abstract: A nonvolatile memory includes a memory cell array including a plurality of memory cells, a pad configured to be connected to a data input/output line, and an input/output circuit configured to receive data to be programmed in the memory cell array and to transmit data read from the memory cell array. The nonvolatile memory further includes a switch configured to couple and decouple the pad and the input/output circuit responsive to a switch control signal and a control circuit configured to generate the switch control signal responsive to a chip enable signal. Data storage devices and methods using such nonvolatile memories are also described.

    Abstract translation: 非易失性存储器包括包括多个存储单元的存储单元阵列，被配置为连接到数据输入/输出线的衬垫以及被配置为接收要在存储器单元阵列中被编程的数据并且发送的输入/输出电路 从存储单元阵列读取的数据。 非易失性存储器还包括开关，其被配置为响应于开关控制信号耦合和去耦合焊盘和输入/输出电路，以及控制电路，被配置为响应芯片使能信号产生开关控制信号。 还描述了使用这种非易失性存储器的数据存储装置和方法。

    Electric device including branched signal lines, and electric device including printed circuit board
    7.
    发明授权
    Electric device including branched signal lines, and electric device including printed circuit board 有权

    公开(公告)号：US12229061B2

    公开(公告)日：2025-02-18

    申请号：US17670962

    申请日：2022-02-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kwangsoo Park ,  Jae-Sang Yun ,  Su-Jin Kim ,  Jiwoon Park

    IPC: G06F13/16 ,  G06F13/40

    Abstract: Disclosed is an electronic device which includes a plurality of memory devices, a memory controller, a first signal line that makes electrical connection between the memory controller and a first branch point, a second signal line that makes electrical connection between the first branch point and a second branch point, a third signal line that makes electrical connection between the first branch point and a third branch point, a fourth signal line that electrically connects the second branch point and the first memory device, a fifth signal line that electrically connects the second branch point and the second memory device, a sixth signal line that electrically connects the third branch point and the third memory device, and a stub that includes a first end electrically connected with at least one of the plurality of signal lines, and a second end being left open-circuit.

    Storage devices and methods of operating storage devices
    8.
    发明授权
    Storage devices and methods of operating storage devices 有权

    公开(公告)号：US11825596B2

    公开(公告)日：2023-11-21

    申请号：US17167209

    申请日：2021-02-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jiwoon Park

    IPC: H05K1/00 ,  H05K1/02 ,  H03H7/06 ,  H05K1/11

    CPC classification number: H05K1/0233 ,  H03H7/06 ,  H05K1/112 ,  H05K2201/094 ,  H05K2201/10159

    Abstract: A storage device is provided. The storage device includes nonvolatile memory devices provided on a printed circuit board (PCB), a connector, a storage controller and at least one first passive filter. The connector is provided in the PCB and includes connection terminals. The storage controller is provided on the PCB, communicates with an external host through the connection terminals and controls the nonvolatile memory devices. The at least one first passive filter is provided in the PCB, is connected between the connector and the storage controller, and performs an equalization on either a signal provided to the storage controller or a signal provided from the storage controller.

    Storage devices and methods of operating storage devices
    9.
    发明授权
    Storage devices and methods of operating storage devices 有权

    公开(公告)号：US11532366B2

    公开(公告)日：2022-12-20

    申请号：US17201761

    申请日：2021-03-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jiwoon Park ,  Jaehyurk Choi

    IPC: G11C16/32 ,  G06F3/06 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26 ,  H03L7/081 ,  H03L7/089 ,  H01L25/065

    Abstract: A storage device includes a semiconductor memory device and a storage controller. The semiconductor memory device receives write data based on a data strobe signal and data signals, and outputs read data based on the data strobe signal and the data signals. The storage controller transmits the data strobe signal and the data signals in parallel to the semiconductor memory device through signal lines. The storage controller includes a first delay circuit that delays the data signals such that some edges of windows of the data signals on the signal lines are desynchronized by first skew offsets which are different from one another.

    Semiconductor device and method of manufacturing the same
    10.
    发明授权
    Semiconductor device and method of manufacturing the same 有权

    公开(公告)号：US11411075B2

    公开(公告)日：2022-08-09

    申请号：US17189700

    申请日：2021-03-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Gihee Cho ,  Sangyeol Kang ,  Jungoo Kang ,  Taekyun Kim ,  Jiwoon Park ,  Sanghyuck Ahn ,  Jin-Su Lee ,  Hyun-Suk Lee ,  Hongsik Chae

    IPC: H01L49/02 ,  H01L27/108

    Abstract: A semiconductor device and a method of manufacturing the same, the device including a plurality of lower electrodes on a semiconductor substrate; a support pattern connecting the lower electrodes at sides of the lower electrodes; and a dielectric layer covering the lower electrodes and the support pattern, wherein each of the plurality of lower electrodes includes a pillar portion extending in a vertical direction perpendicular to a top surface of the semiconductor substrate; and a protrusion protruding from a sidewall of the pillar portion so as to be in contact with the support pattern, the pillar portion includes a conductive material, the protrusion includes a same conductive material as the pillar portion and is further doped with impurities.

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