公开(公告)号：US20220028895A1

公开(公告)日：2022-01-27

申请号：US17494275

申请日：2021-10-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Weonhong KIM ,  Pilkyu KANG ,  Yuichiro SASAKI ,  Sungkeun LIM ,  Yongho HA ,  Sangjin HYUN ,  Kughwan KIM ,  Seungha OH

IPC: H01L27/12 ,  H01L21/762 ,  H01L27/02

Abstract: An integrated circuit device includes an embedded insulation layer, a semiconductor layer on the embedded insulation layer, the semiconductor layer having a main surface, and a plurality of fin-type active areas protruding from the main surface to extend in a first horizontal direction and in parallel with one another, a separation insulation layer separating the semiconductor layer into at least two element regions adjacent to each other in a second horizontal direction intersecting the first horizontal direction, source/drain regions on the plurality of fin-type active areas, a first conductive plug on and electrically connected to the source/drain regions, a buried rail electrically connected to the first conductive plug while penetrating through the separation insulation layer and the semiconductor layer, and a power delivery structure arranged in the embedded insulation layer, the power delivery structure being in contact with and electrically connected to the buried rail.

公开(公告)号：US20200373331A1

公开(公告)日：2020-11-26

申请号：US16807410

申请日：2020-03-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Weonhong KIM ,  Pilkyu KANG ,  Yuichiro SASAKI ,  Sungkeun LIM ,  Yongho HA ,  Sangjin HYUN ,  Kughwan KIM ,  Seungha OH

IPC: H01L27/12 ,  H01L27/02 ,  H01L21/762

Abstract: An integrated circuit device includes an embedded insulation layer, a semiconductor layer on the embedded insulation layer, the semiconductor layer having a main surface, and a plurality of fin-type active areas protruding from the main surface to extend in a first horizontal direction and in parallel with one another, a separation insulation layer separating the semiconductor layer into at least two element regions adjacent to each other in a second horizontal direction intersecting the first horizontal direction, source/drain regions on the plurality of fin-type active areas, a first conductive plug on and electrically connected to the source/drain regions, a buried rail electrically connected to the first conductive plug while penetrating through the separation insulation layer and the semiconductor layer, and a power delivery structure arranged in the embedded insulation layer, the power delivery structure being in contact with and electrically connected to the buried rail.

公开(公告)号：US20240047305A1

公开(公告)日：2024-02-08

申请号：US18199541

申请日：2023-05-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungha OH ,  Jaewon HWANG ,  Kwangjin MOON ,  Hojin LEE ,  Hyungjun JEON

IPC: H01L23/48 ,  H01L23/528 ,  H01L27/088 ,  H01L21/768 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L23/5286 ,  H01L27/0886 ,  H01L27/088 ,  H01L21/76898 ,  H01L24/13 ,  H01L2224/13007 ,  H01L2224/1411 ,  H01L24/14

Abstract: An integrated circuit semiconductor device includes a substrate having a first surface and a second surface opposite to the first surface; a power via penetrating between the first surface and the second surface of the substrate; a cell part including a plurality of individual elements having different thicknesses inside the substrate, and a recess positioned between the individual elements; a signal wiring part on the first surface of the substrate and including an upper multilayer wiring layer connected to the power via; a power transmission network part under the second surface of the substrate and including a lower multilayer wiring layer connected to the power via; and an external connection terminal under the power transmission network part and connected to the lower multilayer wiring layer, wherein the substrate includes a plurality of regions having different thicknesses.

公开(公告)号：US20230164994A1

公开(公告)日：2023-05-25

申请号：US18150523

申请日：2023-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungha OH ,  Weonhong Kim ,  Hoonjoo Na

IPC: H10B43/20 ,  H10B12/00 ,  H10B41/10 ,  H10B41/20 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35

CPC classification number: H10B43/20 ,  H10B12/30 ,  H10B41/10 ,  H10B41/20 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35

Abstract: A three-dimensional semiconductor device includes a first substrate; a plurality of first transistors on the first substrate; a second substrate on the plurality of first transistors; a plurality of second transistors on the second substrate; and an interconnection portion electrically connecting the plurality of first transistors and the plurality of second transistors. Each of the plurality of first transistors includes a first gate insulating film on the first substrate and having a first hydrogen content. Each of the plurality of second transistors includes a second gate insulating film on the second substrate and having a second hydrogen content. The second hydrogen content is greater than the first hydrogen content.

公开(公告)号：US20210391350A1

公开(公告)日：2021-12-16

申请号：US17160874

申请日：2021-01-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungha OH ,  Weonhong KIM ,  Hoonjoo NA

IPC: H01L27/11578 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/108

Abstract: A three-dimensional semiconductor device includes a first substrate; a plurality of first transistors on the first substrate; a second substrate on the plurality of first transistors; a plurality of second transistors on the second substrate; and an interconnection portion electrically connecting the plurality of first transistors and the plurality of second transistors. Each of the plurality of first transistors includes a first gate insulating film on the first substrate and having a first hydrogen content. Each of the plurality of second transistors includes a second gate insulating film on the second substrate and having a second hydrogen content. The second hydrogen content is greater than the first hydrogen content.

公开(公告)号：US20210335707A1

公开(公告)日：2021-10-28

申请号：US17367773

申请日：2021-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yuichiro SASAKI ,  Sungkeun LIM ,  Pil-Kyu KANG ,  Weonhong KIM ,  Seungha OH ,  Yongho HA ,  Sangjin HYUN

IPC: H01L23/522 ,  H01L23/50 ,  H01L23/528

Abstract: A semiconductor device includes a semiconductor layer having a first surface and a second surface opposite to the first surface, an active pattern on the first surface, the active pattern including a source/drain region, a power rail electrically connected to the source/drain region, and a power delivery network on the second surface, the power delivery network electrically connected to the power rail. The semiconductor layer includes an etch stop dopant, and the etch stop dopant has a maximum concentration at the second surface.