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公开(公告)号：US20190289664A1
公开(公告)日：2019-09-19
申请号：US16352122
申请日：2019-03-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsung KHO , Kyuho HAN , Joonseo LEE , Moonyoung JEONG , Giwon LEE
Abstract: A method of a first terminal is provided. The method includes communicating with a first gateway by using a first internet protocol (IP) address allocated to the first terminal, according to a first IP session, in response to a distance between the first terminal and a second gateway being equal to or less than a predetermined threshold, establishing a second IP session with the second gateway while the first IP session is set in the first terminal, receiving, from a second terminal, a first IP session-release message about the first IP session via the second gateway by using a second IP address according to the second IP session, when data from the first terminal is received by the second terminal according to the first IP session, and in response to the first IP session-release message being received from the second gateway, releasing the first IP session with the first gateway.
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公开(公告)号：US20240268129A1
公开(公告)日：2024-08-08
申请号：US18370940
申请日：2023-09-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hongjun LEE , Keunnam KIM , Hui-Jung KIM , Seokhan PARK , Kiseok LEE , Moonyoung JEONG , Jay-Bok CHOI , Hyungeun CHOI , Jinwoo HAN
IPC: H10B80/00 , H01L23/00 , H01L25/00 , H01L25/065 , H01L25/18
CPC classification number: H10B80/00 , H01L24/08 , H01L24/80 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2224/08145 , H01L2224/80895 , H01L2224/80896 , H01L2225/06541 , H01L2924/1431 , H01L2924/1436
Abstract: Disclosed are semiconductor devices and their fabrication methods. The semiconductor device comprises a lower substrate, a lower dielectric structure on the lower substrate, a memory cell structure between the lower substrate and the lower dielectric structure, a lower bonding pad in the lower dielectric structure, an upper dielectric structure on the lower dielectric structure, an upper substrate on the upper dielectric structure, a transistor between the upper substrate and the upper dielectric structure, and an upper bonding pad in the upper dielectric structure. A top surface of the lower bonding pad is in contact with a bottom surface of the upper bonding pad. The lower bonding pad and the upper bonding pad overlap the memory cell structure.
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公开(公告)号：US20230352548A1
公开(公告)日：2023-11-02
申请号：US18219525
申请日：2023-07-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Eunae CHO , Dongjin LEE , Ji Eun LEE , Kyoung-Ho JUNG , Dong Su KO , Yongsu KIM , Jiho YOO , Sung HEO , Hyun PARK , Satoru YAMADA , Moonyoung JEONG , Sungjin KIM , Gyeongsu PARK , Han Jin LIM
IPC: H01L29/49 , H01L21/28 , H01L29/423 , H01L29/51
CPC classification number: H01L29/4236 , H01L21/28088 , H01L29/4966 , H01L29/513 , H01L29/517
Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor.
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公开(公告)号：US20210029515A1
公开(公告)日：2021-01-28
申请号：US16641572
申请日：2017-12-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyuho HAN , Young-Sung KHO , Joonseo LEE , Moonyoung JEONG , Giwon LEE
Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). The present disclosure is to provide a multicast service in a wireless communication system and comprises the steps of: receiving a multicast group participation message transmitted from a terminal via a communication session from a terminal to a first network entity; generating a multicast tunnel generation request message on the basis of the multicast group participation message, and transmitting the same to the first network entity; and generating a multicast service request message on the basis of the multicast group participation message, and transmitting the same to a second network entity. The present research is research that has been conducted with the support of the “Cross-Departmental Giga KOREA Project” funded by the government (the Ministry of Science and ICT) in 2017 (No. GK17N0100, millimeter wave 5G mobile communication system development).
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公开(公告)号：US20190198626A1
公开(公告)日：2019-06-27
申请号：US16288910
申请日：2019-02-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongjin LEE , Junsoo KIM , Moonyoung JEONG , Satoru YAMADA , Dongsoo WOO , Jiyoung KIM
IPC: H01L29/40 , H01L27/108 , H01L29/66 , B82Y10/00 , H01L27/12 , H01L29/423 , H01L29/786 , H01L29/775 , H01L21/84
CPC classification number: H01L29/402 , B82Y10/00 , H01L21/84 , H01L27/088 , H01L27/10876 , H01L27/1203 , H01L29/42392 , H01L29/66439 , H01L29/775 , H01L29/78639 , H01L29/78696
Abstract: A semiconductor device may include a device isolation region configured to define an active region in a substrate, an active gate structure disposed in the active region, and a field gate structure disposed in the device isolation region. The field gate structure may include a gate conductive layer. The active gate structure may include an upper active gate structure including a gate conductive layer and a lower active gate structure formed under the upper active gate structure and vertically spaced apart from the upper active gate structure. The lower active gate structure may include a gate conductive layer. A top surface of the gate conductive layer of the field gate structure is located at a lower level than a bottom surface of the gate conductive layer of the upper active gate structure.
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Patent Agency Ranking
公开(公告)号：US20240196593A1
公开(公告)日：2024-06-13
申请号：US18225798
申请日：2023-07-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Moonyoung JEONG , Hyungjun NOH , Sangho LEE , Yoongi HONG
IPC: H10B12/00
CPC classification number: H10B12/315 , H10B12/05
Abstract: A semiconductor memory device includes a bit line on a substrate and extending in a first direction parallel to a bottom surface of the substrate, a first active pattern on the bit line, a first word line intersecting the first active pattern in a second direction which is parallel to the bottom surface of the substrate and intersects the first direction, and a first conductive pattern on the first active pattern. The first word line includes a first side surface facing the first direction. The first active pattern includes a first portion between the first word line and the first conductive pattern, a second portion between the first word line and the bit line, and a third portion extending on the first side surface of the first word line to connect the first portion to the second portion of the first active pattern.
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公开(公告)号：US20240147706A1
公开(公告)日：2024-05-02
申请号：US18370149
申请日：2023-09-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Keunui KIM , Kiseok LEE , Eunsuk JANG , Seokhan PARK , Seok-Ho SHIN , Joongchan SHIN , Moonyoung JEONG
IPC: H10B12/00
CPC classification number: H10B12/488 , H10B12/315 , H10B12/482 , H10B12/50
Abstract: A semiconductor memory device may include a substrate, a bit line extending in a first direction on the substrate, a first word line and a second word line extending in a second direction to cross the bit line, a back-gate electrode extending in the second direction between the first word line and the second word line, first and second active patterns disposed between the first and second word lines and the back-gate electrode and connected to the bit line, contact patterns coupled to the first and second active patterns, respectively, a first back-gate capping pattern between the contact patterns and the back-gate electrode, and first gate capping patterns between the contact patterns and the first and second word lines. The first back-gate capping pattern and the first gate capping pattern may have first and second seams, which are extended in the second direction and are located at different vertical levels.
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公开(公告)号：US20230363143A1
公开(公告)日：2023-11-09
申请号：US18182539
申请日：2023-03-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kiseok LEE , Moonyoung JEONG , Keunnam KIM , Seokhan PARK
CPC classification number: H10B12/315 , H10B12/482 , H10B12/05 , H10B80/00
Abstract: A semiconductor memory device is disclosed. The semiconductor memory device may include a bit line extending in a first direction, first and second active patterns disposed on the bit line, a back-gate electrode, which is disposed between the first and second active patterns and is extended in a second direction to cross the bit line, a first word line, which is provided at a side of the first active pattern and is extended in the second direction, a second word line, which is provided at an opposite side of the second active pattern and is extended in the second direction, and contact patterns coupled to the first and second active patterns, respectively.
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9.发明申请公开(公告)号：US20210007026A1
公开(公告)日：2021-01-07
申请号：US16978648
申请日：2019-03-06
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsung KHO , Jaehyun HWANG , Joonseo LEE , Moonyoung JEONG , Kyuho HAN
Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-Generation (4G) communication system such as long-term evolution (LTE). Disclosed is radio access technology (RAT) switching in a wireless communication system, and an operating method of a server for managing a session comprises the steps of: receiving information related to a determination on the switching of a RAT; determining, on the basis of the information, whether the RAT for providing a service to a terminal is switched from a first RAT to a second RAT; and transmitting, to an object for processing a user plan, a message indicating that a data route of the terminal will be switched from the first RAT to the second RAT.
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公开(公告)号：US20160260813A1
公开(公告)日：2016-09-08
申请号：US14854272
申请日：2015-09-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Eunae CHO , Dongjin LEE , Ji Eun LEE , Kyoung-Ho JUNG , Dong Su KO , Yongsu KIM , Jiho YOO , Sung HEO , Hyun PARK , Satoru YAMADA , Moonyoung JEONG , Sungjin KIM , Gyeongsu PARK , Han Jin LIM
IPC: H01L29/423 , H01L29/51 , H01L21/28 , H01L29/49
CPC classification number: H01L29/4236 , H01L21/28088 , H01L29/4966 , H01L29/513 , H01L29/517
Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor.
Abstract translation: 提供半导体器件及其制造方法。 半导体器件包括包括沟槽的衬底。 半导体器件还包括设置在沟槽中的栅极电极和设置在衬底和栅电极之间的栅极绝缘膜。 栅电极包括栅极导体和金属元件，并且栅电极的有效功函数小于栅极导体的有效功函数。
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