公开(公告)号：US11735491B2

公开(公告)日：2023-08-22

申请号：US17505953

申请日：2021-10-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunggyun Noh ,  Gun-Hee Bae ,  Sangwoo Pae ,  Jinsoo Bae ,  Deok-Seon Choi ,  Il-Joo Choi

IPC: H01L23/367 ,  H01L23/40 ,  H01L23/22

CPC classification number: H01L23/367 ,  H01L23/22 ,  H01L23/4012 ,  H01L2023/4087

Abstract: A semiconductor package device includes a package substrate, an interposer on the package substrate, a semiconductor package on the interposer, and an under-fill between the interposer and the semiconductor package. The interposer includes at least one first trench at an upper portion of the interposer that extends in a first direction parallel to a top surface of the package substrate. The at least one first trench vertically overlaps an edge region of the semiconductor package. The under-fill fills at least a portion of the at least one trench.

公开(公告)号：US20240194563A1

公开(公告)日：2024-06-13

申请号：US18201466

申请日：2023-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunggyun Noh ,  Jinsoo Bae ,  Il-Joo Choi

IPC: H01L23/433 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/4334 ,  H01L21/56 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13184 ,  H01L2224/16227

Abstract: A semiconductor package includes: a substrate; a semiconductor chip provided on the substrate; a plurality of heat dissipation reinforcements provided on the substrate; and an encapsulant, on the substrate, molding the semiconductor chip and the plurality of heat dissipation reinforcements. Each of the plurality of heat dissipation reinforcements has an elongated shape, and extends along lateral surfaces and an upper surface of the semiconductor chip at a predetermined interval from the semiconductor chip.

公开(公告)号：US11961824B2

公开(公告)日：2024-04-16

申请号：US17680877

申请日：2022-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunggyun Noh ,  Sangwoo Pae ,  Jinsoo Bae ,  Iljoo Choi ,  Deokseon Choi ,  Keunho Rhew

IPC: H01L23/31 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L25/0657 ,  H01L23/3121 ,  H01L24/13 ,  H01L24/14 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L2224/13018 ,  H01L2224/1412 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48227 ,  H01L2224/4912 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2924/3512

Abstract: A semiconductor package includes; a package substrate including an upper surface with a bonding pad, a lower semiconductor chip disposed on the upper surface of the package substrate, wherein an upper surface of the lower semiconductor chip includes a connect edge region including a connection pad and an open edge region including a dam structure including dummy bumps, a bonding wire having a first height above the upper surface of the lower semiconductor chip and connecting the bonding pad and the connection pad, an upper semiconductor chip disposed on the upper surface of the lower semiconductor chip using an inter-chip bonding layer, and a molding portion on the package substrate and substantially surrounding the lower semiconductor chip and the upper semiconductor chip.