公开(公告)号：US10607708B2

公开(公告)日：2020-03-31

申请号：US16539290

申请日：2019-08-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eun Chu Oh ,  Pilsang Yoon ,  Jun Jin Kong ,  Jisu Kim ,  Hong Rak Son ,  Jinbae Bang ,  Daeseok Byeon ,  Taehyun Song ,  Dongjin Shin ,  Dongsup Jin

IPC: G11C16/28 ,  G11C29/02 ,  G11C16/04 ,  G11C29/50 ,  G11C16/26 ,  G11C16/34 ,  G11C11/56 ,  G11C16/10

Abstract: An method of operating a nonvolatile memory device including a plurality of memory cells comprises receiving a read command from an external device, in response to the read command, performing, based on a reference voltage, a first cell counting operation with respect to the plurality of memory cells, adjusting at least one read voltage of first through nth read voltages (where n is a natural number greater than 1) based on a first result of the first cell counting operation, and performing, based on the adjusted at least one read voltage, a read operation corresponding to the read command with respect to the plurality of memory cells.

公开(公告)号：US10381090B2

公开(公告)日：2019-08-13

申请号：US16003729

申请日：2018-06-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eun Chu Oh ,  Pilsang Yoon ,  Jun Jin Kong ,  Jisu Kim ,  Hong Rak Son ,  Jinbae Bang ,  Daeseok Byeon ,  Taehyun Song ,  Dongjin Shin ,  Dongsup Jin

IPC: G11C16/28 ,  G11C16/04 ,  G11C16/10 ,  G11C11/56 ,  G11C16/34 ,  G11C16/26 ,  G11C29/50 ,  G11C29/02

Abstract: An method of operating a nonvolatile memory device including a plurality of memory cells comprises receiving a read command from an external device, in response to the read command, performing, based on a reference voltage, a first cell counting operation with respect to the plurality of memory cells, adjusting at least one read voltage of first through nth read voltages (where n is a natural number greater than 1) based on a first result of the first cell counting operation, and performing, based on the adjusted at least one read voltage, a read operation corresponding to the read command with respect to the plurality of memory cells.

公开(公告)号：US11527295B2

公开(公告)日：2022-12-13

申请号：US17200557

申请日：2021-03-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinbae Bang ,  Doohyun Kim ,  Minseok Kim ,  Jisu Kim

IPC: G11C11/408 ,  G11C16/34 ,  G11C16/26 ,  G11C16/24 ,  G11C7/10 ,  G11C16/04

Abstract: Disclosed are a nonvolatile memory device and a read method of the nonvolatile memory device. The nonvolatile memory device includes a memory cell array, a row decoder circuit, and a page buffer circuit including first latches and second latches. The page buffer circuit respectively latches first sensing values, which are based on data stored in adjacent memory cells, at the first latches and respectively latches second sensing values, which are based on data stored in selected memory cells, at the second latches at least two times.

公开(公告)号：US20250157543A1

公开(公告)日：2025-05-15

申请号：US18933556

申请日：2024-10-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinbae Bang ,  Kiwhan Song

IPC: G11C16/10 ,  G11C16/04 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26

Abstract: A memory device includes a memory cell array including a plurality of memory cells, and a page buffer circuit including a plurality of page buffers respectively coupled to the plurality of memory cells through a plurality of bit line. Each page buffer of the plurality of page buffers includes a first transistor coupling a corresponding bit line of the plurality of bit lines to a first node, based on a first control signal, a second transistor coupling the first node to a sensing node, a sensing latch configured to sense data stored in a corresponding memory cell, based on a first voltage level of the sensing node, a forcing latch configured to store forcing data, a first discharge transistor including a first gate terminal configured to receive the forcing data, and a second discharge transistor including a second gate terminal configured to receive a discharge control signal.