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公开(公告)号：US11150987B2
公开(公告)日：2021-10-19
申请号：US16891517
申请日：2020-06-03
Applicant: Samsung Electronics Co., Ltd.
Inventor： Changkyu Seol , Hyejeong So , Kwanwoo Noh , Hongrak Son , Pilsang Yoon
Abstract: Channel selection information indicate positions of data bits of input data, positions of error correction code (ECC) parity bits for correcting errors in the input data, and positions of state shaping parity bits. The ECC parity bits and the state shaping parity bits are generated to cause a decrease in a quantity of memory cells, of the plurality of memory cells, in which at least one target state among a plurality of states is programmed. An alignment vector is generated based on aligning the data bits of the input data, the ECC parity bits, and the state shaping parity bits, based on the channel selection information. A codeword is generated based on simultaneously performing state shaping and ECC encoding with respect to the alignment vector. Write data are written in the nonvolatile memory device based on the codeword.
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公开(公告)号：US11526287B2
公开(公告)日：2022-12-13
申请号：US16828170
申请日：2020-03-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyejeong So , Changkyu Seol , Hong Rak Son , Pilsang Yoon , Jinsoo Lim , Jae Hun Jang , Seonghyeong Choi
Abstract: A storage device is provided including a memory controller having a neural processing unit (NPU); a first nonvolatile memory (NVM) connected to the memory controller through a first channel; and a second NVM connected to the memory controller through a second channel. The first NVM stores first weight data for the NPU and the second stores second weight data for the NPU. The memory controller is configured to determine one of the first and second channels that is less frequently accessed upon receiving an inference request from the neural processor, and access a corresponding one of the first weight data and the second weight data using the determined one channel.
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公开(公告)号：US12176926B2
公开(公告)日：2024-12-24
申请号：US18480261
申请日：2023-10-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Changkyu Seol , Jiyoup Kim , Hyejeong So , Myoungbo Kwak , Pilsang Yoon , Sucheol Lee , Youngdon Choi , Junghwan Choi
Abstract: Encoding and decoding apparatuses and methods for implementing multi-mode coding are provided. The apparatus includes a transmitter and a receiver connected to a data bus. When data bursts are converted by the transmitter into codewords each including a plurality of symbols and/or a codeword received by the receiver is recovered as data bursts, maximum transition avoidance (MTA) codeword mappings in which no maximum transition (MT) event occurs between the plurality of symbols and minimum DC current (MDC) codeword mappings related to minimum power consumption of the plurality of symbols are used.
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公开(公告)号：US11824563B2
公开(公告)日：2023-11-21
申请号：US17689462
申请日：2022-03-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Changkyu Seol , Jiyoup Kim , Hyejeong So , Myoungbo Kwak , Pilsang Yoon , Sucheol Lee , Youngdon Choi , Junghwan Choi
CPC classification number: H03M7/14 , G06F13/1673 , G06F13/4063 , H03M13/2909 , H03M13/451 , H03M13/611
Abstract: Encoding and decoding apparatuses and methods for implementing multi-mode coding are provided. The apparatus includes a transmitter and a receiver connected to a data bus. When data bursts are converted by the transmitter into codewords each including a plurality of symbols and/or a codeword received by the receiver is recovered as data bursts, maximum transition avoidance (MTA) codeword mappings in which no maximum transition (MT) event occurs between the plurality of symbols and minimum DC current (MDC) codeword mappings related to minimum power consumption of the plurality of symbols are used.
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Patent Agency Ranking
公开(公告)号：US11468306B2
公开(公告)日：2022-10-11
申请号：US16906209
申请日：2020-06-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jaehun Jang , Hongrak Son , Changkyu Seol , Hyejeong So , Hwaseok Oh , Pilsang Yoon , Jinsoo Lim
Abstract: A storage system includes a host device and a storage device. The host device provides first input data for data storage function and second input data for artificial intelligence (AI) function. The storage device stores the first input data from the host device, and performs AI calculation based on the second input data to generate calculation result data. The storage device includes a first processor, a first nonvolatile memory, a second processor and a second nonvolatile memory. The first processor controls an operation of the storage device. The first nonvolatile memory stores the first input data. The second processor performs the AI calculation, and is distinguished from the first processor. The second nonvolatile memory stores weight data associated with the AI calculation, and is distinguished from the first nonvolatile memory.
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公开(公告)号：US11757567B2
公开(公告)日：2023-09-12
申请号：US17590474
申请日：2022-02-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Changkyu Seol , Jiyoup Kim , Hyejeong So , Myoungbo Kwak , Pilsang Yoon , Sucheol Lee , Jinsoo Lim , Youngdon Choi
CPC classification number: H04L1/0041 , G06F1/03 , H04L1/0045 , H04L1/0057 , H04L1/0084
Abstract: Provided is a device and method for encoding and decoding to implement maximum transition avoidance coding with minimum overhead. An exemplary device performs encoding and/or decoding, by using sub-block lookup tables representing correlations between some bit values in a data burst and symbols, a combining lookup table selectively interconnecting the sub-block lookup tables based on remaining bit values of the data burst, and a codeword decoding lookup table designating the sub-block lookup tables corresponding to the symbols of each of received codewords.
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公开(公告)号：US20210132832A1
公开(公告)日：2021-05-06
申请号：US16828170
申请日：2020-03-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyejeong So , Changkyu Seol , Hong Rak Son , Pilsang Yoon , Jinsoo Lim , Jae Hun Jang , Seonghyeong Choi
Abstract: A storage device is provided including a memory controller having a neural processing unit (NPU); a first nonvolatile memory (NVM) connected to the memory controller through a first channel; and a second NVM connected to the memory controller through a second channel. The first NVM stores first weight data for the NPU and the second stores second weight data for the NPU. The memory controller is configured to determine one of the first and second channels that is less frequently accessed upon receiving an inference request from the neural processor, and access a corresponding one of the first weight data and the second weight data using the determined one channel.
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公开(公告)号：US10459788B2
公开(公告)日：2019-10-29
申请号：US15676623
申请日：2017-08-14
Inventor： Donghwan Lee , Sae-Young Chung , Lanying Zhao , Sungik Choi , Junjin Kong , Changkyu Seol , Hyejeong So , Hong Rak Son
Abstract: A method of decoding may include performing fewer than ⌊ 2 k - 1 k ⌋ number of sensing operations of multilevel cells within a nonvolatile memory device, decoding pages corresponding to each of the sensing operations while correcting a channel error using an RIO code, and extracting user data from the decoded pages.
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公开(公告)号：US09734898B2
公开(公告)日：2017-08-15
申请号：US14308739
申请日：2014-06-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Changkyu Seol , Junjin Kong , Hyejeong So , Hong Rak Son
CPC classification number: G11C11/5621 , G06F12/0246 , G06F2212/72
Abstract: A memory controller includes a state shaping encoder that receives k-bit write data, selects a logical page with reference to state shape mapping information, and changes data of the logical page to decrease an occurrence probability of a high-order program state among program states used to program the k-bit data in multi-level memory cells.
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