公开(公告)号：US12205951B2

公开(公告)日：2025-01-21

申请号：US17491841

申请日：2021-10-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwook Kim ,  Seunggeol Nam ,  Taehwan Moon ,  Kwanghee Lee ,  Jinseong Heo ,  Hagyoul Bae ,  Yunseong Lee

IPC: H01L27/092 ,  H01L29/24 ,  H01L29/51 ,  H01L29/78 ,  H01L29/786 ,  H10B10/00

Abstract: Provided is a semiconductor device including a first semiconductor transistor including a semiconductor channel layer, and a metal-oxide semiconductor channel layer, and having a structure in which a second semiconductor transistor is stacked on the top of the first semiconductor transistor. A gate stack of the second semiconductor transistor and the top of a gate stack of the first semiconductor transistor may overlap by greater than or equal to 90%. The first semiconductor transistor and the second semiconductor transistor may have a similar level of operation characteristics.

公开(公告)号：US11996150B2

公开(公告)日：2024-05-28

申请号：US17540675

申请日：2021-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunggeol Nam ,  Jinseong Heo ,  Taehwan Moon ,  Hagyoul Bae

IPC: G11C15/04

CPC classification number: G11C15/046

Abstract: Disclosed are a non-volatile content addressable memory device having a simple cell configuration and/or an operating method thereof. The non-volatile content addressable memory device includes a plurality of unit cells, wherein each of the plurality of unit cells consists of or includes a first ferroelectric transistor and a second ferroelectric transistor The first and second ferroelectric transistors are of different types such as different electrical types from each other. The first and second ferroelectric transistors may be connected in series or in parallel to each other. The first and second ferroelectric transistors may share one word line and one match line. The first and second ferroelectric transistors may share one search line. One of the first and second ferroelectric transistors may be connected to a search line and the other one may be connected to a bar search line. The first and second ferroelectric transistors may share one match line.

公开(公告)号：US11984514B2

公开(公告)日：2024-05-14

申请号：US18324638

申请日：2023-05-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong Heo ,  Taehwan Moon ,  Hagyoul Bae ,  Seunggeol Nam ,  Sangwook Kim ,  Kwanghee Lee

IPC: H01L29/86 ,  H10B69/00 ,  H10K10/50 ,  H10K19/00

CPC classification number: H01L29/86 ,  H10B69/00 ,  H10K10/50 ,  H10K19/00 ,  H10K19/201

Abstract: A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.

公开(公告)号：US12132109B2

公开(公告)日：2024-10-29

申请号：US17677654

申请日：2022-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hagyoul Bae ,  Seunggeol Nam ,  Jinseong Heo ,  Sanghyun Jo ,  Dukhyun Choe

IPC: H01L29/06 ,  H01L21/66 ,  H01L29/51 ,  H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L29/78391 ,  H01L22/12 ,  H01L29/516 ,  H01L29/6684 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/7851 ,  H01L29/78696

Abstract: Provided are a ferroelectric semiconductor device and a method of extracting a defect density of the same. A ferroelectric electronic device includes a first layer, an insulating layer including a ferroelectric layer and a first interface that is adjacent to the first layer, and an upper electrode over the insulating layer, wherein the insulating layer has a bulk defect density of 1016 cm−3eV−1 or more and an interface defect density of 1010 cm−2eV−1 or more.

公开(公告)号：US20230307553A1

公开(公告)日：2023-09-28

申请号：US18324638

申请日：2023-05-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong Heo ,  Taehwan Moon ,  Hagyoul Bae ,  Seunggeol Nam ,  Sangwook Kim ,  Kwanghee Lee

IPC: H01L29/86 ,  H10K10/50 ,  H10K19/00 ,  H10B69/00

CPC classification number: H01L29/86 ,  H10K10/50 ,  H10K19/00 ,  H10K19/201 ,  H10B69/00

Abstract: A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.

公开(公告)号：US20230180481A1

公开(公告)日：2023-06-08

申请号：US18062245

申请日：2022-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hagyoul Bae ,  Seungyeul Yang ,  Minhyun Lee ,  Jinseong Heo ,  Taehwan Moon

IPC: H10B51/20 ,  H10B51/30

CPC classification number: H01L27/11597 ,  H01L27/1159

Abstract: A vertical non-volatile memory device may include a plurality of insulating layers and a plurality of conductive layers alternately stacked on a surface of a substrate in a direction perpendicular to the surface of the substrate; a channel layer on the substrate, where the channel layer extends in the direction perpendicular to the surface of the substrate and the channel layer may be on lateral surfaces of the plurality of insulating layers and lateral surfaces of the plurality of conductive layers; and a ferroelectric layer between the channel layer and the lateral surfaces of the plurality of conductive layers.

公开(公告)号：US12119060B2

公开(公告)日：2024-10-15

申请号：US17953491

申请日：2022-09-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong Heo ,  Hagyoul Bae ,  Seunggeol Nam ,  Hyunjae Lee ,  Dukhyun Choe

IPC: G11C15/04

CPC classification number: G11C15/04

Abstract: Provided is a content-addressable memory. The content-addressable memory may include a memory cell connected to a match line, a word line, and a search line, and the memory cell includes a first channel layer and a second channel layer doped with different dopants.

公开(公告)号：US11978798B2

公开(公告)日：2024-05-07

申请号：US17515984

申请日：2021-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunggeol Nam ,  Jinseong Heo ,  Sangwook Kim ,  Hagyoul Bae ,  Taehwan Moon ,  Yunseong Lee

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/51 ,  H01L29/786 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/78391 ,  H01L29/0847 ,  H01L29/516 ,  H01L29/7851 ,  H01L29/78696 ,  H01L29/0673 ,  H01L29/42392

Abstract: Provided is a ferroelectric semiconductor device including a source and a drain having different polarities. The ferroelectric semiconductor may include a ferroelectric including zirconium oxide (ZrO2), hafnium oxide (HfO2), and/or hafnium-zirconium oxide (HfxZr1-xO, 0

公开(公告)号：US11699765B2

公开(公告)日：2023-07-11

申请号：US17461034

申请日：2021-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong Heo ,  Taehwan Moon ,  Hagyoul Bae ,  Seunggeol Nam ,  Sangwook Kim ,  Kwanghee Lee

IPC: H01L29/86 ,  H10K10/50 ,  H10K19/00 ,  H10B69/00

CPC classification number: H01L29/86 ,  H10B69/00 ,  H10K10/50 ,  H10K19/00 ,  H10K19/201

Abstract: A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.

公开(公告)号：US20230267320A1

公开(公告)日：2023-08-24

申请号：US18168681

申请日：2023-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehwan MOON ,  Jinseong Heo ,  Seunggeol Nam ,  Hagyoul Bae ,  Hyunjae Lee

IPC: G06N3/063 ,  H10B51/30 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78 ,  H01L29/775 ,  G11C11/22 ,  G11C11/54

CPC classification number: G06N3/063 ,  H10B51/30 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/4966 ,  H01L29/516 ,  H01L29/78391 ,  H01L29/7851 ,  H01L29/775 ,  G11C11/223 ,  G11C11/2255 ,  G11C11/2257 ,  G11C11/54

Abstract: A ferroelectric field effect transistor includes: a source; a drain; a first channel connected to and between the source and the drain; a second channel connected to and between the source and the drain and spaced apart from the first channel; a ferroelectric layer covering the first channel and the second channel; a first gate layer disposed on the ferroelectric layer in correspondence with the first channel; a second gate layer disposed on the ferroelectric layer in correspondence with the second channel; and a gate wiring electrically connecting the first gate layer to the second gate layer, wherein the first gate layer includes a first metallic material having a first work function, and the second gate layer includes a second metallic material having a second work function, wherein the second work function is different from the first work function.