公开(公告)号：US20250105030A1

公开(公告)日：2025-03-27

申请号：US18782816

申请日：2024-07-24

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： Jieun SEO ,  Donghoon KWON

IPC: H01L21/67 ,  H01L21/02

Abstract: A substrate cleaning device includes a cleaning module configured to spray a cleaning solution on an upper side of a substrate, a curtain module coupled with the cleaning module and configured to spray a curtain body to at least one of a first area including an upper side of an edge of the substrate, a second area between a cleaner guard at least partially surrounding the substrate and a first upper portion of the edge of the substrate, and a third area including a second upper portion of an outside of the edge of the substrate in parallel to an internal wall of the cleaner guard, and a driver coupled with the cleaning module and configured to horizontally move the cleaning module on a third upper portion of the substrate.

公开(公告)号：US20220406812A1

公开(公告)日：2022-12-22

申请号：US17689280

申请日：2022-03-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junsuk KIM ,  Donghoon KWON ,  Kiwoong KIM ,  Chungki MIN ,  Youngbeom PYON ,  Changsun HWANG

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L23/522 ,  H01L23/528

Abstract: A semiconductor device includes a substrate; a first stack structure including first gate electrodes on the substrate; and a second stack structure on the first stack structure; wherein the first stack structure includes a first lower staircase region, a second lower staircase region, and a third lower staircase region, wherein the second stack structure includes a first upper staircase region, a second upper staircase region, a third upper staircase region, and at least one through portion penetrating the second stack structure and on the first to third lower staircase regions, wherein the first lower staircase region has a same shape as a shape of the first upper staircase region, the second lower staircase region has a same shape as a shape of the second upper staircase region, and the third lower staircase region has a same shape as a shape of the third upper staircase region.

公开(公告)号：US20240313016A1

公开(公告)日：2024-09-19

申请号：US18367570

申请日：2023-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghoon KWON

IPC: H01L27/146

CPC classification number: H01L27/14621 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14643 ,  H01L27/14685

Abstract: An image sensor, including a substrate, a plurality of photodiodes disposed within the substrate, a filter layer on the plurality of photodiodes, a plurality of color filters on the filter layer, and a plurality of micro lenses on the plurality of color filters, wherein the filter layer includes a lower reflective layer on the plurality of photodiodes, a bandpass filter on the lower reflective layer, transmitting light of a first wavelength band, and reflecting light of remaining wavelength bands, and an upper reflective layer on the bandpass filter, each of the lower and upper reflective layers including a porous material.

公开(公告)号：US20240238849A1

公开(公告)日：2024-07-18

申请号：US18392348

申请日：2023-12-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jieun SEO ,  Donghoon KWON

IPC: B08B3/02 ,  B05B1/02

CPC classification number: B08B3/024 ,  B05B1/02 ,  B08B2203/02

Abstract: A wafer cleaning apparatus including a rotating plate configured to support a wafer thereon, and a cleaning unit above the rotating plate and configured to spray cleaning water, wherein the cleaning unit includes a body, a nozzle in the body, at least one supply pipe connected to the nozzle and configured to supply a cleaning substance, and a discharge member at a lower end portion of the nozzle and configured to discharge the cleaning water, which includes the cleaning substance, wherein the discharge member has a spraying port configured spray the cleaning water therethrough, and wherein the spraying port has an X shape may be provided.

公开(公告)号：US20220328379A1

公开(公告)日：2022-10-13

申请号：US17559094

申请日：2021-12-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon KWON ,  Chanwook SEO ,  Chungki MIN ,  Boun YOON

IPC: H01L23/48 ,  H01L25/065 ,  H01L25/10 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582 ,  H01L23/528

Abstract: A semiconductor device includes a first substrate; circuit elements on the first substrate; lower interconnection lines electrically connected to the circuit elements; a second substrate on the lower interconnection lines; gate electrodes spaced apart from each other and stacked on the second substrate in a first direction that is perpendicular to an upper surface of the second substrate; channel structures penetrating through the gate electrodes, extending in the first direction, and respectively including a channel layer; through-vias extending in the first direction and electrically connecting at least one of the gate electrodes or the channel structures to the circuit elements; an insulating region surrounding side surfaces of through-vias; and a via pad between the through-vias and at least one of the lower interconnection lines in the first direction and spaced apart from the second substrate in a second direction, parallel to an upper surface of the second substrate.

公开(公告)号：US20240181593A1

公开(公告)日：2024-06-06

申请号：US18228481

申请日：2023-07-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wonkeun CHO ,  Eungchul KIM ,  Taesung KIM ,  Donghoon KWON ,  Hyunmo AN ,  Suengjun OH

IPC: B24B37/013

CPC classification number: B24B37/013

Abstract: A polishing process apparatus includes a carrier configured to support an object, a platen provided below the carrier and configured to accommodate at least one eddy current sensor, the at least one eddy current sensor including a coil configured to output an eddy current, a power supply circuit configured to supply power to the coil and a voltage detection circuit connected to the coil and configured to detect raw voltage data, a polishing pad on an upper surface of the platen, and a controller configured to acquire first data by receiving the raw voltage data from the voltage detection circuit a plurality of times while a polishing process is performed on the object, acquire second data by sequentially applying a first filter and a second filter to the first data, the first filter being different from the second filter and measure a thickness of a target layer included in the object based on the second data.

公开(公告)号：US20230371254A1

公开(公告)日：2023-11-16

申请号：US18062169

申请日：2022-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon KWON ,  Hyo-Jung Kim ,  Chungki Min ,  Boun Yoon

IPC: H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B43/10

CPC classification number: H01L27/11582 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565

Abstract: A semiconductor device may include a gate stack including insulating patterns and conductive patterns, which are alternately stacked, first block channel structures penetrating the gate stack, second block channel structures penetrating the gate stack, and an isolation structure penetrating the gate stack. The isolation structure may include a block isolation structure, a first word line isolation structure, and a second word line isolation structure. The block isolation structure may include a first side surface connected to a side surface of the first word line isolation structure, and a second side surface connected to a side surface of the second word line isolation structure, and the first block channel structures comprise an intervening channel structure between the first and second side surfaces of the block isolation structure.

公开(公告)号：US20230328986A1

公开(公告)日：2023-10-12

申请号：US18070536

申请日：2022-11-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghoon KWON ,  Chungki MIN ,  Boun YOON ,  Kihoon JANG

IPC: H10B43/27 ,  G11C16/04 ,  H01L23/522 ,  H01L23/528 ,  H10B41/27 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35

CPC classification number: H01L27/11582 ,  G11C16/0483 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/1157 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/11556

Abstract: A semiconductor device includes a source structure, first and second stack structures, including first gate electrodes stacked on the source structure to be spaced apart from each other; a dummy structure on the source structure between the first and the second stack structures, and including second gate electrodes stacked to be spaced apart from each other; first separation regions passing through the first and second stack structures, and spaced apart from each other; second separation regions extending between each of the first and second stack structures and the dummy structure; channel structures passing through the first and second stack structures, and respectively including a channel layer, connected to the source structure through the channel layer; and first source contact structures passing through the dummy structure, and respectively including a first contact layer connected to the source structure through a lower surface of the first contact layer.

公开(公告)号：US20220254802A1

公开(公告)日：2022-08-11

申请号：US17473141

申请日：2021-09-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghoon KWON ,  Chang-Sun HWANG ,  Chungki MIN

IPC: H01L27/11575 ,  H01L23/535 ,  H01L23/00 ,  H01L27/11556 ,  H01L27/11548 ,  H01L27/11529 ,  H01L27/11582 ,  H01L27/11573

Abstract: A semiconductor device includes an upper-level layer having a cell array region, a cell contact region and a dummy region on a substrate. The upper-level layer includes a semiconductor layer, a cell array structure including first and second stack structures sequentially stacked on the semiconductor layer of the cell array region, the first and second stack structures comprising stacked electrodes, a first staircase structure on the semiconductor layer of the cell contact region, the electrodes extending from the cell array structure into the first staircase structure such that the cell array structure is connected to the first staircase structure, a vertical channel structure penetrating the cell array structure, a dummy structure in the dummy region, the dummy structure at the same level as the second stack structure, the dummy structure including stacked first layers, and cell contact plugs in the cell contact region and connected to the first staircase structure.

公开(公告)号：US20220102370A1

公开(公告)日：2022-03-31

申请号：US17324411

申请日：2021-05-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghoon KWON ,  Junsuk KIM ,  Jongheun LIM

IPC: H01L27/11575 ,  H01L23/535 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11582 ,  H01L27/11573 ,  H01L21/768

Abstract: A memory device includes a cell stacked structure on a substrate, the cell stacked structure including insulation layers and gate patterns alternately stacked, a channel structure passing through the cell stacked structure, the channel structure extending in a vertical direction, a dummy structure on the substrate, the dummy structure being spaced apart from the cell stacked structure, and the dummy structure including insulation layers and metal patterns alternately stacked, a first through via contact passing through the dummy structure, the first through via contact extending in the vertical direction, and a first capping insulation pattern between a sidewall of the first through via contact and each of the metal patterns in the dummy structure, the first capping insulation pattern insulating the first through via contact from each of the metal patterns.