公开(公告)号：US20240319366A1

公开(公告)日：2024-09-26

申请号：US18612741

申请日：2024-03-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daeyun KIM ,  Myoungoh KI ,  Jonghan Ahn

IPC: G01S17/26 ,  G01S7/4863 ,  G01S7/4865 ,  G01S17/894 ,  G06F1/06

CPC classification number: G01S17/26 ,  G01S7/4863 ,  G01S7/4865 ,  G01S17/894 ,  G06F1/06

Abstract: An image sensor for measuring a depth of an object disposed in an unambiguous range is provided. The image sensor includes: a modulation clock generating circuit configured to generate N modulation clock signals respectively having N phases; a demodulation clock generating circuit configured to generate N demodulation clock signals respectively having N phases respectively corresponding to the N modulation clock signals; a phase selection circuit configured to select one modulation clock signal from among the N modulation clock signals to output as a pre-modulation signal, based on a random number, and select, from among the N demodulation clock signals, and output as N pre-demodulation signals corresponding to the pre-modulation signal, based on the random number; and a time gating circuit configured to control a time at which the pre-modulation signal and the N pre-demodulation signals are applied, based on the unambiguous range.

公开(公告)号：US20230077551A1

公开(公告)日：2023-03-16

申请号：US17945688

申请日：2022-09-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Daeyun KIM ,  Myoungoh Ki ,  Seungchul Shin

IPC: H04N5/369 ,  H04N5/376

Abstract: An image sensor and a camera are provided. The image sensor includes: a demodulation clock generation circuit configured to generate first to fourth demodulation clock signals respectively having first to fourth phases; a demodulation phase selection circuit configured to generate first to fourth pre-demodulation signals based on the first to fourth demodulation clock signals and a random number that changes for each of a plurality of packets; a delay circuit configured to generate a first delay signals, second delay signals, third delay signals and fourth delay signals by delaying the first to fourth pre-demodulation signals by a plurality of delay phases; and a phase mixer configured to generate first to fourth demodulation signals of which phases are changed based on an address that changes for each of the plurality of packets. The first to fourth phases have a phase difference of 90° from each other.

公开(公告)号：US20220166946A1

公开(公告)日：2022-05-26

申请号：US17381777

申请日：2021-07-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bumsik CHUNG ,  Minsun KEEL ,  Myoungoh KI ,  Daeyun KIM

IPC: H04N5/378 ,  G01S7/48 ,  G01S17/89 ,  H04N5/341 ,  H04N5/376 ,  H04N5/232 ,  G01S17/26

Abstract: An imaging device includes a light source operated by an optical control signal generated using a first reference signal having a first frequency and a second reference signal, having a second frequency different from the first frequency, a plurality of pixels, each of the plurality of pixels including a pixel circuit outputting a pixel signal corresponding to the electrical charge of a photodiode, and a logic circuit configured to generate raw data to generate a depth image, using the pixel signal. The plurality of pixels include first pixels and second pixels, and the logic circuit inputs a first photo control signal, having the first frequency, to the pixel circuit connected to a photodiode in each of the first pixels, and inputs a second photo control signal, having the second frequency, to the pixel circuit connected to a photodiode in each of the second pixels.

公开(公告)号：US20240323571A1

公开(公告)日：2024-09-26

申请号：US18614416

申请日：2024-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daeyun KIM ,  Hoyong Lee

IPC: H04N25/76 ,  G01S7/481 ,  G01S17/894 ,  H01L27/146 ,  H04N13/289 ,  H04N25/53 ,  H04N25/77

CPC classification number: H04N25/7795 ,  G01S7/4816 ,  G01S17/894 ,  H01L27/14636 ,  H04N25/53 ,  H04N25/77 ,  H01L27/14643 ,  H04N13/289

Abstract: An image sensor is disclosed. The image sensor includes: a demodulation clock generation circuit configured to generate M demodulation clock signals having N phases; a buffer circuit including M signal lines configured to transfer each of the M demodulation clock signals; and a pixel array including a plurality of pixels, wherein a pixel of the plurality of pixels has M taps and is configured to receive M demodulation signals passing through the M signal lines as inputs. Each of the M demodulation signals is conducted by each of the M signal lines during an integration time of one frame of the pixel, and M and N are integers greater than or equal to 2.

公开(公告)号：US20240260483A1

公开(公告)日：2024-08-01

申请号：US18507672

申请日：2023-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daeseok HAN ,  Jaehyeong LEE ,  Jinhyoun KANG ,  Daeyun KIM ,  Jaeho SHIN ,  Daeho YANG

IPC: H10N60/12 ,  H10N60/01 ,  H10N60/80

CPC classification number: H10N60/124 ,  H10N60/0941 ,  H10N60/805

Abstract: A device including a Josephson junction device including a first superconductor layer, a first oxide layer disposed on a first upper surface of the first superconductor layer, a second superconductor layer disposed to partially overlap the first superconductor layer, a second oxide layer disposed on a second upper surface of the second superconductor layer, and a third superconductor layer including a first portion facing the first upper surface of the first superconductor layer and a second portion facing the second upper surface of the second superconductor layer, and a first thickness of a first portion of the first oxide layer between a lower surface of the first portion of the third superconductor layer and a third upper surface of the first superconductor layer is less than a second thickness of a second portion of the first oxide layer.