公开(公告)号：US20250169376A1

公开(公告)日：2025-05-22

申请号：US18664982

申请日：2024-05-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyeong LEE ,  Hyeokshin KWON ,  Daeyun KIM ,  Daeseok HAN

IPC: H10N60/01 ,  H10N60/12 ,  H10N60/85

Abstract: A Josephson junction device has a second region between first and third regions, and the Josephson junction device includes: a substrate in the first, second, and third regions; a first superconductive layer arranged on the substrate in the first and second regions and not the third region; a second superconductive layer arranged in the second and third regions and spatially overlapping the first superconductive layer in the second region; an oxide layer sandwiched between the first superconductive layer the second superconductive in the second region; and a first trench in the substrate in the third region, the trench passing under the second superconductive layer in the third region.

公开(公告)号：US20250169380A1

公开(公告)日：2025-05-22

申请号：US18623276

申请日：2024-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyeong LEE ,  Jaeho SHIN ,  Insu JEON ,  Daeseok HAN

IPC: H10N69/00 ,  H10N60/01 ,  H10N60/12

Abstract: A qubit chip device includes: a substrate; a superconducting qubit provided on the substrate; a ground plate, on the substrate, surrounding a perimeter of the superconducting qubit, and including a conductive layer on the substrate and a superconducting layer on the conductive layer; and a readout circuit electrically connected to the superconducting qubit.

公开(公告)号：US20240260483A1

公开(公告)日：2024-08-01

申请号：US18507672

申请日：2023-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daeseok HAN ,  Jaehyeong LEE ,  Jinhyoun KANG ,  Daeyun KIM ,  Jaeho SHIN ,  Daeho YANG

IPC: H10N60/12 ,  H10N60/01 ,  H10N60/80

CPC classification number: H10N60/124 ,  H10N60/0941 ,  H10N60/805

Abstract: A device including a Josephson junction device including a first superconductor layer, a first oxide layer disposed on a first upper surface of the first superconductor layer, a second superconductor layer disposed to partially overlap the first superconductor layer, a second oxide layer disposed on a second upper surface of the second superconductor layer, and a third superconductor layer including a first portion facing the first upper surface of the first superconductor layer and a second portion facing the second upper surface of the second superconductor layer, and a first thickness of a first portion of the first oxide layer between a lower surface of the first portion of the third superconductor layer and a third upper surface of the first superconductor layer is less than a second thickness of a second portion of the first oxide layer.

公开(公告)号：US20240237558A9

公开(公告)日：2024-07-11

申请号：US18194539

申请日：2023-03-31

Applicant: Samsung Electronics Co., Ltd. ,  POSTECH Research and Business Development Foundation

Inventor： Jaehyeong LEE ,  Gilho LEE ,  Jinhyoun KANG ,  Jaeho SHIN ,  Seunghan LEE ,  Daeseok HAN

IPC: H10N69/00

CPC classification number: H10N69/00

Abstract: A superconducting quantum interferometric device (SQUID) includes: a conductive material region formed on a partial region of a substrate; a first superconducting material layer including a first loop including first and second extension units that are spaced apart from each other to form a proximity Josephson junction and that form a stack structure with the conductive material region; a second superconducting material layer including a second loop including first and second end units spaced apart from each other; and a tunnel Josephson junction formed by a stack structure including a tunnel thin film layer forming and the first and second end units, wherein at least a portion of the second loop forms a stack structure with the first loop.

公开(公告)号：US20240138271A1

公开(公告)日：2024-04-25

申请号：US18194539

申请日：2023-03-30

Applicant: Samsung Electronics Co., Ltd. ,  POSTECH Research and Business Development Foundation

Inventor： Jaehyeong LEE ,  Gilho LEE ,  Jinhyoun KANG ,  Jaeho SHIN ,  Seunghan LEE ,  Daeseok HAN

IPC: H10N69/00

CPC classification number: H10N69/00

Abstract: A superconducting quantum interferometric device (SQUID) includes: a conductive material region formed on a partial region of a substrate; a first superconducting material layer including a first loop including first and second extension units that are spaced apart from each other to form a proximity Josephson junction and that form a stack structure with the conductive material region; a second superconducting material layer including a second loop including first and second end units spaced apart from each other; and a tunnel Josephson junction formed by a stack structure including a tunnel thin film layer forming and the first and second end units, wherein at least a portion of the second loop forms a stack structure with the first loop.