公开(公告)号：US20200051926A1

公开(公告)日：2020-02-13

申请号：US16529486

申请日：2019-08-01

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： SungWon Cho ,  ChangOh Kim ,  Il Kwon Shim ,  InSang Yoon ,  KyoungHee Park

IPC: H01L23/552 ,  H01L23/522 ,  H01L23/36 ,  H01L23/00

Abstract: A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.

公开(公告)号：US20190355695A1

公开(公告)日：2019-11-21

申请号：US16531593

申请日：2019-08-05

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： JinHee Jung ,  OhHan Kim ,  InSang Yoon

IPC: H01L23/00 ,  H01L23/552 ,  H01L21/56 ,  H01L23/31 ,  H01L21/48 ,  H01L23/498

Abstract: A semiconductor device has a carrier with an adhesive layer formed over the carrier. Alignment marks are provided for picking and placing the electrical component on the carrier or adhesive layer. An electrical component is disposed on the adhesive layer by pressing terminals of the electrical component into the adhesive layer. The electrical component can be a semiconductor die, discrete component, electronic module, and semiconductor package. A leadframe is disposed over the adhesive layer. A shielding layer is formed over the electrical component. An encapsulant is deposited over the electrical component. The carrier and adhesive layer are removed so that the terminals of the electrical component extend out from the encapsulant for electrical interconnect. A substrate includes a plurality of conductive traces. The semiconductor device is disposed on the substrate with the terminals of the electrical component in contact with the conductive traces.

公开(公告)号：US20180294233A1

公开(公告)日：2018-10-11

申请号：US15485085

申请日：2017-04-11

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： InSang Yoon ,  SeungYong Chai ,  SoYeon Park

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L21/485 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16227 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/014 ,  H01L2224/81

Abstract: A semiconductor device has a first conductive layer and a second conductive layer. A first portion of the first conductive layer is aligned with a first portion of the second conductive layer. An insulating layer is deposited over the first conductive layer and second conductive layer. A third conductive layer includes a first portion of the third conductive layer vertically aligned with the first portion of the first conductive layer and the first portion of the second conductive layer. An electrical component is disposed over the first conductive layer and second conductive layer. An encapsulant is deposited over the first conductive layer, second conductive layer, and electrical component. A cut is made through the encapsulant, first conductive layer, and second conductive layer. A fourth conductive layer is deposited over side surfaces of the first conductive layer, second conductive layer, and encapsulant.

公开(公告)号：US20220246541A1

公开(公告)日：2022-08-04

申请号：US17660093

申请日：2022-04-21

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： SungWon Cho ,  ChangOh Kim ,  Il Kwon Shim ,  InSang Yoon ,  KyoungHee Park

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/36 ,  H01L23/522 ,  H01L23/50 ,  H01L23/60 ,  H01L23/498 ,  H01L27/02 ,  H01L23/31 ,  H01L23/367

Abstract: A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.

公开(公告)号：US10804119B2

公开(公告)日：2020-10-13

申请号：US15459997

申请日：2017-03-15

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： OhHan Kim ,  KyungHwan Kim ,  WoonJae Beak ,  HunTeak Lee ,  InSang Yoon

IPC: H01L21/00 ,  H01L21/56 ,  H01L23/58 ,  H01L23/552 ,  H01L23/31 ,  H01L21/683 ,  H01L23/00 ,  H01L25/16

Abstract: A semiconductor device has a semiconductor die or component, including an IPD, disposed over an attach area of a penetrable film layer with a portion of the semiconductor die or component embedded in the penetrable film layer. A conductive layer is formed over a portion of the film layer within the attach area and over a portion of the film layer outside the attach area. An encapsulant is deposited over the film layer, conductive layer, and semiconductor die or component. The conductive layer extends outside the encapsulant. An insulating material can be disposed under the semiconductor die or component. A shielding layer is formed over the encapsulant. The shielding layer is electrically connected to the conductive layer. The penetrable film layer is removed. The semiconductor die or component disposed over the film layer and covered by the encapsulant and shielding layer form an SIP module without a substrate.

公开(公告)号：US10388637B2

公开(公告)日：2019-08-20

申请号：US15830644

申请日：2017-12-04

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： OhHan Kim ,  DeokKyung Yang ,  HunTeak Lee ,  InSang Yoon ,  Il Kwon Shim

IPC: H01L25/16 ,  H01L23/498 ,  H01L23/552 ,  H01L25/065 ,  H01L23/538 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/13

Abstract: A semiconductor device has a first substrate. A first semiconductor component and second semiconductor component are disposed on the first substrate. In some embodiments, a recess is formed in the first substrate, and the first semiconductor component is disposed on the recess of the first substrate. A second substrate has an opening formed through the second substrate. A third semiconductor component is disposed on the second substrate. The second substrate is disposed over the first substrate and second semiconductor component. The first semiconductor component extends through the opening. An encapsulant is deposited over the first substrate and second substrate.

公开(公告)号：US10319684B2

公开(公告)日：2019-06-11

申请号：US15485085

申请日：2017-04-11

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： InSang Yoon ,  SeungYong Chai ,  SoYeon Park

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L21/768 ,  H01L23/498 ,  H01L23/538 ,  H01L23/552

Abstract: A semiconductor device has a first conductive layer and a second conductive layer. A first portion of the first conductive layer is aligned with a first portion of the second conductive layer. An insulating layer is deposited over the first conductive layer and second conductive layer. A third conductive layer includes a first portion of the third conductive layer vertically aligned with the first portion of the first conductive layer and the first portion of the second conductive layer. An electrical component is disposed over the first conductive layer and second conductive layer. An encapsulant is deposited over the first conductive layer, second conductive layer, and electrical component. A cut is made through the encapsulant, first conductive layer, and second conductive layer. A fourth conductive layer is deposited over side surfaces of the first conductive layer, second conductive layer, and encapsulant.

公开(公告)号：US20180061806A1

公开(公告)日：2018-03-01

申请号：US15686584

申请日：2017-08-25

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： JinHee Jung ,  OhHan Kim ,  InSang Yoon

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L23/498 ,  H01L23/552

CPC classification number: H01L24/96 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49838 ,  H01L23/49861 ,  H01L23/552 ,  H01L24/16 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/95001 ,  H01L2224/95136 ,  H01L2924/19105 ,  H01L2924/3025

Abstract: A semiconductor device has a carrier with an adhesive layer formed over the carrier. Alignment marks are provided for picking and placing the electrical component on the carrier or adhesive layer. An electrical component is disposed on the adhesive layer by pressing terminals of the electrical component into the adhesive layer. The electrical component can be a semiconductor die, discrete component, electronic module, and semiconductor package. A leadframe is disposed over the adhesive layer. A shielding layer is formed over the electrical component. An encapsulant is deposited over the electrical component. The carrier and adhesive layer are removed so that the terminals of the electrical component extend out from the encapsulant for electrical interconnect. A substrate includes a plurality of conductive traces. The semiconductor device is disposed on the substrate with the terminals of the electrical component in contact with the conductive traces.

公开(公告)号：US11842991B2

公开(公告)日：2023-12-12

申请号：US16990887

申请日：2020-08-11

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  OhHan Kim ,  HeeSoo Lee ,  HunTeak Lee ,  InSang Yoon ,  Il Kwon Shim

IPC: H01L25/00 ,  H01L23/00 ,  H01L21/56 ,  H01L23/552 ,  H01L25/065 ,  H01L25/16 ,  H01L23/498 ,  H01L23/31 ,  H01L23/538 ,  H01L23/50

CPC classification number: H01L25/50 ,  H01L21/56 ,  H01L21/561 ,  H01L23/552 ,  H01L24/17 ,  H01L24/83 ,  H01L25/0652 ,  H01L25/16 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/1146 ,  H01L2224/11334 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/48091 ,  H01L2224/48179 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3025 ,  H01L2224/97 ,  H01L2224/81

Abstract: A semiconductor device has a first substrate and a second substrate. An opening is formed through the second substrate. A first semiconductor component and second semiconductor component are disposed between the first substrate and second substrate. The second substrate is electrically coupled to the first substrate through the first semiconductor component. A first terminal of the first semiconductor component is electrically coupled to the first substrate. A second terminal of the first semiconductor component is electrically coupled to the second substrate. The second semiconductor component extends into the opening. An encapsulant is deposited over the first substrate and second substrate.

公开(公告)号：US11342278B2

公开(公告)日：2022-05-24

申请号：US17008997

申请日：2020-09-01

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： SungWon Cho ,  ChangOh Kim ,  Il Kwon Shim ,  InSang Yoon ,  KyoungHee Park

IPC: H01L23/34 ,  H01L23/28 ,  H01L21/00 ,  H05K7/20 ,  H01L23/552 ,  H01L23/00 ,  H01L23/36 ,  H01L23/522 ,  H01L23/50 ,  H01L23/60 ,  H01L23/498 ,  H01L27/02 ,  H01L23/31 ,  H01L23/367

Abstract: A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.