Abstract:
A storage device includes at least one non-volatile memory device, a first temperature sensor and a second temperature sensor arranged adjacent to the at least one non-volatile memory device, and a controller controlling an operation performance level of the at least one non-volatile memory device based on a plurality of performance tables, a first temperature detected by the first temperature sensor, and a second temperature detected by the second temperature sensor. Each performance table includes a plurality of entries, and each entry includes information regarding the operation performance level of the at least one non-volatile memory device. Each performance table corresponds to a result of a calculation regarding the first temperature and the second temperature.
Abstract:
A power supply management circuit manages transfer of power that is supplied to a peripheral device from a power supply device. The power supply management circuit includes a current limiter and one or more capacitors. The current limiter limits intensity of first current received from the power supply device through an input terminal to be smaller than or equal to limitation intensity, and outputs second current having intensity limited to be smaller than or equal to the limitation intensity through an output terminal connected to the peripheral device. When the intensity of the first current exceeds the limitation intensity, the capacitors output third current through the output terminal.
Abstract:
A storage device includes at least one non-volatile memory device, a first temperature sensor and a second temperature sensor arranged adjacent to the at least one non-volatile memory device, and a controller controlling an operation performance level of the at least one non-volatile memory device based on a plurality of performance tables, a first temperature detected by the first temperature sensor, and a second temperature detected by the second temperature sensor. Each performance table includes a plurality of entries, and each entry includes information regarding the operation performance level of the at least one non-volatile memory device. Each performance table corresponds to a result of a calculation regarding the first temperature and the second temperature.
Abstract:
A semiconductor module may include a heat-transferring part connecting at least one of a control device, a buffer semiconductor device, and a memory device to a connector. The heat-transferring part may be configured to have a thermal conductivity higher than the substrate. Accordingly, during the operation of the semiconductor module, the connector can have a temperature lower than the devices.
Abstract:
A semiconductor package includes a semiconductor chip and a polydimethylsiloxane (PDMS) layer that is provided on the semiconductor chip and of which upper surface is exposed to the outside. Since the semiconductor package may include the PDMS layer, heat emitting performance of the semiconductor package in a vacuum state may improve.
Abstract:
A power supply management circuit manages transfer of power that is supplied to a peripheral device from a power supply device. The power supply management circuit includes a current limiter and one or more capacitors. The current limiter limits intensity of first current received from the power supply device through an input terminal to be smaller than or equal to limitation intensity, and outputs second current having intensity limited to be smaller than or equal to the limitation intensity through an output terminal connected to the peripheral device. When the intensity of the first current exceeds the limitation intensity, the capacitors output third current through the output terminal.
Abstract:
Disclosed is a printed circuit hoard. The printed circuit board includes a plurality of insulation layers and a plurality of pattern layers alternately stacked. The printed circuit board includes a plurality of device areas on which semiconductor packages are mounted and a peripheral area adjacent the device areas. An electrostatic discharge pattern is in a respective pattern layer among the plurality of pattern layers and is disposed at a boundary region between a respective device area of the plurality of device areas and the peripheral area.
Abstract:
An operating method of a memory controller to control a nonvolatile memory device includes receiving information about operation failure from the nonvolatile memory device, receiving lock-out status information from the nonvolatile memory device, determining whether a lock-out signal is output based on the lock-out status information, and determining a failure block corresponding to the information about the operation failure as a normal block or a bad block depending on the determination result.
Abstract:
A storage device may include a nonvolatile memory including a plurality of memory blocks and a memory controller configured to determine a comparison between an idle current value of the nonvolatile memory and a reference current value and to adjust, based on the comparison, a start temperature at which the storage device begins operating speed control of the storage device.
Abstract:
A storage device includes memories and a controller. The controller controls first and second program operations on the memory. When a temperature of the memory is lower than a reference value, the controller controls execution of the first program operation. When the temperature of the memory is equal to or higher than the reference value, the controller controls execution of the second program operation which consumes a smaller amount of power than the first program operation. The controller adjusts an operational condition of the memory such that bandwidth on the memory remains equivalent during the first and second program operations.