公开(公告)号：US20240114676A1

公开(公告)日：2024-04-04

申请号：US18525187

申请日：2023-11-30

申请人： Samsung Electronics Co., Ltd.

发明人： Taejin PARK ,  Taehoon KIM ,  Kyujin KIM ,  Chulkwon PARK ,  Sunghee HAN ,  Yoosang HWANG

IPC分类号： H10B12/00

CPC分类号： H10B12/34 ,  H10B12/053 ,  H10B12/315 ,  H10B12/482

摘要： An integrated circuit device includes a substrate having an active region and a word line trench therein. The word line trench includes a lower portion having a first width, and an upper portion, which extends between the lower portion and a surface of the substrate and has a second width that is greater than the first width. A word line is provided, which extends in and adjacent a bottom of the word line trench. A gate insulation layer is provided, which extends between the word line and sidewalls of the lower portion of the word line trench. An electrically insulating gate capping layer is provided in the upper portion of the word line trench. An insulation liner is provided, which extends between the gate capping layer and sidewalls of the upper portion of the word line trench. The gate insulation layer extends between the insulation liner and a portion of the gate capping layer, which extends within the upper portion of the word line trench.

公开(公告)号：US20240284657A1

公开(公告)日：2024-08-22

申请号：US18529698

申请日：2023-12-05

申请人： Samsung Electronics Co., Ltd.

发明人： Minho CHOI ,  Kiseok LEE ,  Chansic YOON ,  Chulkwon PARK ,  Jaybok CHOI

IPC分类号： H10B12/00

CPC分类号： H10B12/34 ,  H10B12/315 ,  H10B12/482

摘要： A semiconductor device includes a substrate having a plurality of active regions and defining a plurality of first gate trenches and a plurality of second gate trenches crossing the plurality of active regions and extending in a first horizontal direction, a plurality of gate structures including a plurality of first gate structures within the plurality of first gate trenches and a plurality of second gate structures within the plurality of second gate trenches, a bit line structure crossing the plurality of gate structures and extending in a second horizontal direction that intersects the first horizontal direction, and a contact plug disposed on a side surface of the bit line structure. When viewed in plan view, an area of at least some of the plurality of first gate structures is different from an area of at least some of the plurality of second gate structures.

公开(公告)号：US20220189968A1

公开(公告)日：2022-06-16

申请号：US17373539

申请日：2021-07-12

申请人： Samsung Electronics Co., Ltd.

发明人： Taejin PARK ,  Kyujin KIM ,  Chulkwon PARK ,  Sunghee HAN

IPC分类号： H01L27/108

摘要： A semiconductor memory device includes a substrate comprising a memory cell region and a dummy cell region surrounding the memory cell region, the memory cell region including a plurality of memory cells, a plurality of active regions in the memory cell region, each of the plurality of active regions extending in a long axis direction, the long axis direction being a diagonal direction with respect to a first horizontal direction and a second horizontal direction orthogonal to the first horizontal direction, each of the plurality of active regions having a first width in a short axis direction orthogonal to the long axis direction, and a plurality of dummy active regions in the dummy cell region, each extending in the long axis direction, each of the plurality of dummy active regions having a second width greater than the first width in the short axis direction.

公开(公告)号：US20240138143A1

公开(公告)日：2024-04-25

申请号：US18545419

申请日：2023-12-19

申请人： Samsung Electronics Co., Ltd.

发明人： Taejin PARK ,  Kyujin KIM ,  Chulkwon PARK ,  Sunghee HAN

IPC分类号： H10B12/00

CPC分类号： H10B12/50 ,  H10B12/0335 ,  H10B12/053 ,  H10B12/09 ,  H10B12/315 ,  H10B12/34 ,  H10B12/482

摘要： A semiconductor memory device includes a substrate comprising a memory cell region and a dummy cell region surrounding the memory cell region, the memory cell region including a plurality of memory cells, a plurality of active regions in the memory cell region, each of the plurality of active regions extending in a long axis direction, the long axis direction being a diagonal direction with respect to a first horizontal direction and a second horizontal direction orthogonal to the first horizontal direction, each of the plurality of active regions having a first width in a short axis direction orthogonal to the long axis direction, and a plurality of dummy active regions in the dummy cell region, each extending in the long axis direction, each of the plurality of dummy active regions having a second width greater than the first width in the short axis direction.

公开(公告)号：US20240032280A1

公开(公告)日：2024-01-25

申请号：US18224802

申请日：2023-07-21

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Taejin PARK ,  Kyujin KIM ,  Bongsoo KIM ,  Huijung KIM ,  Chulkwon PARK ,  Gyunghyun YOON ,  Heejae CHAE

IPC分类号： H10B12/00

CPC分类号： H10B12/34 ,  H10B12/053

摘要： An Integrated Circuit (IC) semiconductor device includes: field insulating layers buried in field trenches disposed apart from each other inside a substrate; active regions defined by the field insulating layers; and active fins disposed on the active regions and protruding from surfaces of the field insulating layers. The field insulating layers include a first subfield insulating layer and a second subfield insulating layer, and a surface of the first subfield insulating layer is disposed at a level lower than a level of a surface of the second subfield insulating layer.