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    INTEGRATED CIRCUIT DEVICES HAVING BURIED WORD LINES THEREIN AND METHODS OF FORMING THE SAME
    1.
    发明公开
    INTEGRATED CIRCUIT DEVICES HAVING BURIED WORD LINES THEREIN AND METHODS OF FORMING THE SAME 审中-公开

    公开(公告)号：US20240114676A1

    公开(公告)日：2024-04-04

    申请号：US18525187

    申请日：2023-11-30

    申请人： Samsung Electronics Co., Ltd.

    发明人： Taejin PARK ,  Taehoon KIM ,  Kyujin KIM ,  Chulkwon PARK ,  Sunghee HAN ,  Yoosang HWANG

    IPC分类号： H10B12/00

    CPC分类号： H10B12/34 ,  H10B12/053 ,  H10B12/315 ,  H10B12/482

    摘要： An integrated circuit device includes a substrate having an active region and a word line trench therein. The word line trench includes a lower portion having a first width, and an upper portion, which extends between the lower portion and a surface of the substrate and has a second width that is greater than the first width. A word line is provided, which extends in and adjacent a bottom of the word line trench. A gate insulation layer is provided, which extends between the word line and sidewalls of the lower portion of the word line trench. An electrically insulating gate capping layer is provided in the upper portion of the word line trench. An insulation liner is provided, which extends between the gate capping layer and sidewalls of the upper portion of the word line trench. The gate insulation layer extends between the insulation liner and a portion of the gate capping layer, which extends within the upper portion of the word line trench.

    SEMICONDUCTOR DEVICE
    3.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240290868A1

    公开(公告)日：2024-08-29

    申请号：US18404607

    申请日：2024-01-04

    申请人： Samsung Electronics Co., Ltd.

    发明人： Taejin PARK ,  Bongsoo KIM ,  Huijung KIM

    IPC分类号： H01L29/66 ,  H01L29/06 ,  H10B12/00

    CPC分类号： H01L29/6656 ,  H01L29/0649 ,  H10B12/315

    摘要： A semiconductor device includes a first structure including a first impurity region, a second impurity region, and an isolation region, a second structure on the first structure and including a contact opening penetrating through the second structure and exposing the first impurity region, a pattern structure including a contact portion connected to the first impurity region in the contact opening, and a line portion on the contact portion and the second structure, and a spacer structure between a side surface of the contact opening and the contact portion. The spacer structure includes a first spacer layer on the side surface of the contact opening, and a second spacer layer between the first spacer layer and the contact portion. A lower end of the second spacer layer is at a higher level than a lower surface of the contact portion.

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    4.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20240365531A1

    公开(公告)日：2024-10-31

    申请号：US18768714

    申请日：2024-07-10

    申请人： Samsung Electronics Co., Ltd.

    发明人： Taejin PARK ,  Hui-Jung KIM ,  Sangho LEE

    IPC分类号： H10B12/00

    CPC分类号： H10B12/315 ,  H10B12/0335 ,  H10B12/053 ,  H10B12/34 ,  H10B12/482

    摘要： A semiconductor memory device includes active regions including first impurity regions and second impurity regions, word lines on the active regions and extended in a first direction, bit lines on the word lines and extended in a second direction crossing the first direction, the bit lines being connected to the first impurity regions, first contact plugs between the bit lines, the first contact plugs being connected to the second impurity regions, landing pads on the first contact plugs, respectively, and gap-fill structures filling spaces between the landing pads, top surfaces of the gap-fill structures being higher than top surfaces of the landing pads.

    SEMICONDUCTOR MEMORY DEVICES
    6.
    发明申请
    SEMICONDUCTOR MEMORY DEVICES 有权

    公开(公告)号：US20220189968A1

    公开(公告)日：2022-06-16

    申请号：US17373539

    申请日：2021-07-12

    申请人： Samsung Electronics Co., Ltd.

    发明人： Taejin PARK ,  Kyujin KIM ,  Chulkwon PARK ,  Sunghee HAN

    IPC分类号： H01L27/108

    摘要： A semiconductor memory device includes a substrate comprising a memory cell region and a dummy cell region surrounding the memory cell region, the memory cell region including a plurality of memory cells, a plurality of active regions in the memory cell region, each of the plurality of active regions extending in a long axis direction, the long axis direction being a diagonal direction with respect to a first horizontal direction and a second horizontal direction orthogonal to the first horizontal direction, each of the plurality of active regions having a first width in a short axis direction orthogonal to the long axis direction, and a plurality of dummy active regions in the dummy cell region, each extending in the long axis direction, each of the plurality of dummy active regions having a second width greater than the first width in the short axis direction.

    SEMICONDUCTOR DEVICES
    9.
    发明公开
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20240315005A1

    公开(公告)日：2024-09-19

    申请号：US18388266

    申请日：2023-11-09

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Kiseok LEE ,  Sangjae PARK ,  Huijung KIM ,  Taejin PARK ,  Chansic YOON ,  Myeongdong LEE

    IPC分类号： H10B12/00

    CPC分类号： H10B12/315 ,  H10B12/0335 ,  H10B12/482

    摘要： A semiconductor device includes an active pattern array including active patterns on a substrate; a first contact structure on a central portion of each active pattern; a bit line structure on the first contact structure; a second contact structure on an end of each active pattern; a third contact structure on the second contact structure; and a capacitor electrically connected to the third contact structure, wherein the active pattern array includes active pattern rows spaced apart from each other in a second direction parallel the substrate, the active pattern rows include active patterns spaced apart from each other in a first direction parallel to the substrate, the active patterns extend in a third direction having an acute angle with the first/second directions, the active patterns in the rows are aligned in the first direction, and the second contact structure has a rectangular shape in a plan view.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
    10.
    发明公开
    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20240284662A1

    公开(公告)日：2024-08-22

    申请号：US18435231

    申请日：2024-02-07

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Heejae CHAE ,  Taejin PARK ,  Hyunjin LEE ,  Hosang LEE ,  Yun CHOI

    IPC分类号： H10B12/00 ,  H01L21/762 ,  H01L29/49

    CPC分类号： H10B12/488 ,  H01L21/76232 ,  H01L29/4916 ,  H10B12/34

    摘要： A semiconductor device includes a substrate including a word line trench extending in a first horizontal direction; a gate dielectric layer in the word line trench; a word line extending in the first horizontal direction and in a lower portion of the word line trench on the gate dielectric layer; an insulation capping layer extending in an upper portion of the word line trench on the word line; and a plurality of gate electrodes on the substrate, wherein the word line comprises: a word line lower region extending in the first horizontal direction and including a first gate electrode of the plurality of gate electrodes on the gate dielectric layer; and a word line upper region extending in the first horizontal direction on the word line lower region and including a plurality of second gate electrodes of the plurality of gate electrodes and the first gate electrode.