FAST POLYNOMIAL DIVISION BY MONOMIAL FOR REED-SOLOMON ELP MAINTENANCE

    公开(公告)号:US20240380416A1

    公开(公告)日:2024-11-14

    申请号:US18196581

    申请日:2023-05-12

    Abstract: Systems, devices, and methods for decoding information bits obtained from storage, including obtaining a codeword from among a plurality of codewords stored in a storage device, wherein the codeword includes a plurality of frames; obtaining an initial error locator polynomial (ELP) corresponding to the codeword; decoding a frame of the plurality of frames; based on determining that the frame is successfully decoded, determine an updated ELP based on the initial ELP and information about the frame; and obtaining information bits corresponding to the codeword based on the updated ELP, wherein the updated ELP includes a plurality of updated coefficients, and wherein the updated ELP is determined by simultaneously calculating at least two updated coefficients from among the plurality of updated coefficients.

    THRESHOLD ESTIMATION IN NAND FLASH DEVICES
    2.
    发明申请

    公开(公告)号:US20200234772A1

    公开(公告)日:2020-07-23

    申请号:US16253938

    申请日:2019-01-22

    Abstract: A method for determining an optimal threshold of a nonvolatile memory device, the method including: reading a page from a nonvolatile memory device with a default threshold and attempting to hard decode the page using the default threshold; reading the page two more times with a predetermined offset voltage when the hard decoding fails and attempting to soft decode the page using the default threshold; approximating an empirical distribution of successfully decoded bits with a Gaussian distribution for each level; finding an intersection of the Gaussian distributions; and setting the intersection as a new reading threshold and reading the page again with the new reading threshold.

    LOW-POWER SYSTEMATIC ECC ENCODER WITH BALANCING BITS

    公开(公告)号:US20240372568A1

    公开(公告)日:2024-11-07

    申请号:US18142703

    申请日:2023-05-03

    Abstract: Systems, devices, and methods for encoding information bits for storage, including obtaining information bits and a target constraints vector, placing the information bits in an input vector, setting balance bits included in the input vector to zero, encoding the input vector using a systematic code to obtain a preliminary codeword, applying a constraints matrix to the preliminary codeword to obtain a preliminary constraints vector, applying a transition matrix to a sum of the preliminary constraints vector and the target constraints vector to determine updated balance bits, obtaining an output codeword based on the information bits and the updated balance bits, and storing the output codeword in the storage device.

    METHOD AND APPARATUS FOR PARTIAL PAGE COMPRESSION
    6.
    发明申请
    METHOD AND APPARATUS FOR PARTIAL PAGE COMPRESSION 有权
    部分页面压缩的方法和装置

    公开(公告)号:US20160371028A1

    公开(公告)日:2016-12-22

    申请号:US14743445

    申请日:2015-06-18

    Abstract: A memory system includes a memory device, the memory device including, a memory cell array, and a compression encoder, the memory cell array including a first plurality of multi level cells (MLCs), the memory device being configured to, generate a first partial page by performing one or more first sensing operation on the first plurality of MLCs using one or more first reference voltages, output the first partial page, generate a second partial page by performing a second sensing operation on the first plurality of MLCs based on a second reference voltage, the second reference voltage having a different voltage level than the one or more first reference voltages, generate a second compressed partial page by compressing the second partial page using the compression encoder, and output the compressed second partial page.

    Abstract translation: 存储器系统包括存储器件,存储器件包括存储器单元阵列和压缩编码器,所述存储器单元阵列包括第一多个多电平单元(MLC),所述存储器器件被配置为产生第一部分 通过使用一个或多个第一参考电压对所述第一多个MLC执行一个或多个第一感测操作,输出所述第一部分页面,通过基于第二部分页面对所述第一多个MLC执行第二感测操作来生成第二部分页面 参考电压,具有与所述一个或多个第一参考电压不同的电压电平的所述第二参考电压,通过使用所述压缩编码器压缩所述第二部分页面来生成第二压缩部分页面,并输出所述压缩的第二局部页面。

    SOFT REED-SOLOMON DECODER FOR A NON-VOLATILE MEMORY

    公开(公告)号:US20240137048A1

    公开(公告)日:2024-04-25

    申请号:US18045576

    申请日:2022-10-11

    CPC classification number: H03M13/1575 H03M13/1111 H03M13/1545

    Abstract: A soft-decision decoding computes a first syndrome polynomial in accordance with a received word, computes a second syndrome polynomial by multiplying the first syndrome polynomial by a locator polynomial based on locations of erasures within the received word, finds a basis and private solution to an affine space of polynomials that solve key equations based on the second syndrome polynomial, determines a weak set of a locations of symbols in the received word with confidence below a certain confidence level, computes a matrix from the basis, the private solution and the weak set, determines sub-matrices in the matrix whose rank is equal to a rank of the matrix, determines error locator polynomial (ELP) candidates from the sub-matrices, the basis, and the private solution, and corrects the received word using a selected one of the ELP candidates.

    HIGH THROUGHPUT POLAR ECC DECODING VIA COMPRESSED SUCCESSIVE CANCELLATION ALGORITHM

    公开(公告)号:US20230308208A1

    公开(公告)日:2023-09-28

    申请号:US17551780

    申请日:2021-12-15

    Inventor: Amit BERMAN

    CPC classification number: H04L1/003 H03M13/11 H04L1/0057 H04L1/165

    Abstract: A storage system, including a storage device configured to store a plurality of encoded values, wherein each value of the plurality of encoded values has a predetermined value length and is within a predetermined range, and wherein the predetermined range is not a power of 2; and at least one processor configured to: group the plurality of encoded values into a codeword; obtain a plurality of bit chunks, wherein each bit chunk of the plurality of bit chunks represents a corresponding encoded value of the plurality of encoded values, and wherein a length of the each bit chunk is selected from among one or more predetermined bit chunk lengths which are determined based on the predetermined range; select a variable-length prefix from among a plurality of variable-length prefixes, wherein the variable-length prefix indicates bit chunk lengths of the plurality of bit chunks; obtain a compressed codeword including the variable-length prefix and the plurality of bit chunks; and decode the plurality of encoded values based on the compressed codeword.

    HIGH THROUGHPUT POLAR CODEWORD DECODING BY DECODING BCH SUB-CODE IN POLAR CODE STRUCTURE

    公开(公告)号:US20240380417A1

    公开(公告)日:2024-11-14

    申请号:US18196244

    申请日:2023-05-11

    Abstract: Systems, devices, and methods for decoding information bits obtained from storage, including obtaining a frame corresponding to a codeword from the storage device, performing a first decoding operation on the frame, based on the first decoding operation indicating that a number of errors is greater than a predetermined number, selecting at least one potential error bit, and perform a second decoding operation based on the at least one potential error bit, based on the second decoding operation indicating that the number of errors is not equal to the predetermined number plus one, determining that the frame is not correctable by the first decoding operation and the second decoding operation, and based on the second decoding operation indicating that the number of errors is equal to the predetermined number plus one, correcting the frame based on a result of the second decoding operation to obtain a corrected frame, and obtaining information bits corresponding to the codeword based on the corrected frame.

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