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公开(公告)号：US20140106510A1
公开(公告)日：2014-04-17
申请号：US14107836
申请日：2013-12-16
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Eung Suek LEE , Jee Soo MOK , Jun Oh HWANG
IPC: H01L23/00
CPC classification number: H01L24/81 , H01L21/563 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/742 , H01L2224/1132 , H01L2224/11901 , H01L2224/13016 , H01L2224/13099 , H01L2224/13139 , H01L2224/13147 , H01L2224/16 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H05K3/321 , H05K2201/10674 , H05K2201/10977 , H01L2924/00014 , H01L2924/00
Abstract: In accordance with various embodiments, there is provided a method of fabricating a die mounting substrate, including the steps of preparing a mounting substrate including a pad and a die including a terminal, and printing a conductive paste bump on one of the pad or the terminal. The method further includes the step of connecting the pad and the terminal to each other using the conductive paste bump, thereby surface-mounting the die on the mounting substrate.
Abstract translation: 根据各种实施例，提供一种制造管芯安装基板的方法，包括以下步骤：制备包括焊盘和包括端子的管芯的安装基板，以及在导电焊膏或端子之一上印刷导电膏凸块 。 该方法还包括使用导电膏凸起将焊盘和端子彼此连接的步骤，从而将管芯表面安装在安装基板上。
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Patent Agency Ranking
公开(公告)号：US20160105956A1
公开(公告)日：2016-04-14
申请号：US14877291
申请日：2015-10-07
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jun Oh HWANG , Kwang Hee KWON , Seung Eun LEE , Young Kwan LEE , Yul Kyo CHUNG , Se Rang IM , Ki Jung SUNG
CPC classification number: H05K3/205 , H05K1/115 , H05K3/108 , H05K2203/054
Abstract: The present invention provides a printed circuit board includes an insulating member, a first plating layer buried in a bottom region of the insulating member, a second plating layer buried in a top region of the insulating member and a plating via for electrically connecting the first plating layer and the second plating layer by being buried in any one among the top region and the bottom region of the insulating member.
Abstract translation: 本发明提供了一种印刷电路板，包括绝缘构件，埋在绝缘构件的底部区域中的第一镀层，埋在绝缘构件的顶部区域中的第二镀层，以及用于将第一镀层 层和第二镀层被埋在绝缘构件的顶部区域和底部区域中的任一个中。
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公开(公告)号：US20190035758A1
公开(公告)日：2019-01-31
申请号：US15828948
申请日：2017-12-01
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jun Oh HWANG , Ki Jung SUNG
IPC: H01L23/00
Abstract: A fan-out semiconductor package may include a support member having a through-hole, a semiconductor chip disposed in the through-hole, a component embedded structure disposed adjacent to and spaced apart from the semiconductor chip in the through-hole by a predetermined distance, an encapsulant, and a connection member. The semiconductor chip has an active surface having connection pads disposed thereon and an inactive surface opposing the active surface. The component embedded structure has a plurality of passive components embedded therein. The encapsulant encapsulates at least portions of the support member, the component embedded structure, and the semiconductor chip. The connection member is disposed on the support member, the component embedded structure, and the active surface of the semiconductor chip. The connection member includes redistribution layers and vias electrically connecting the redistribution layers to the plurality of passive components and the connection pads of the semiconductor chip.
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公开(公告)号：US20180286790A1
公开(公告)日：2018-10-04
申请号：US16001430
申请日：2018-06-06
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jung Hyun CHO , Yong Ho BAEK , Jun Oh HWANG , Joo Hwan JUNG , Moon Hee YI
IPC: H01L23/495 , H01L23/367 , H01L23/00 , H01L23/31 , H01L23/522
CPC classification number: H01L23/49503 , H01L23/3107 , H01L23/3677 , H01L23/5226 , H01L23/525 , H01L23/5389 , H01L24/09 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/12105 , H01L2224/24195 , H01L2924/10252 , H01L2924/10253 , H01L2924/10329 , H01L2924/14 , H01L2924/1431 , H01L2924/1432 , H01L2924/1433 , H01L2924/1434 , H01L2924/15172 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H01L2924/3025 , H01L2924/3511 , H01L2924/37001
Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole and having a passive component disposed in the first connection member; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed therein and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the passive component is electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.
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公开(公告)号：US20180350747A1
公开(公告)日：2018-12-06
申请号：US15713200
申请日：2017-09-22
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jun Oh HWANG , Kwang Yun KIM , Ki Jung SUNG
IPC: H01L23/538 , H01L23/13 , H01L23/31 , H01L23/00 , H01L23/48 , H01L23/367 , H01L23/552
CPC classification number: H01L23/5386 , H01L23/13 , H01L23/3128 , H01L23/367 , H01L23/3677 , H01L23/481 , H01L23/5384 , H01L23/5389 , H01L23/552 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/24 , H01L2224/02379 , H01L2224/0401 , H01L2224/04105 , H01L2224/05024 , H01L2224/12105 , H01L2224/13023 , H01L2224/13024 , H01L2224/16227 , H01L2224/16265 , H01L2224/18 , H01L2224/2401 , H01L2224/24195 , H01L2224/24225 , H01L2224/24265 , H01L2924/14 , H01L2924/15153 , H01L2924/19041 , H01L2924/19102 , H01L2924/19105 , H01L2924/301 , H01L2924/3025 , H01L2924/3511 , H01L2924/37001
Abstract: There is provided a fan-out semiconductor device in which a first package having a semiconductor chip disposed therein and having a fan-out form and a second package having a passive component disposed therein and having a fan-out form are stacked in a vertical direction so that the semiconductor chip and the passive component are electrically connected to each other by a path as short as possible.
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公开(公告)号：US20180182691A1
公开(公告)日：2018-06-28
申请号：US15647961
申请日：2017-07-12
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jung Hyun CHO , Yong Ho BAEK , Jun Oh HWANG , Joo Hwan JUNG , Moon Hee YI
IPC: H01L23/495 , H01L23/31 , H01L23/00 , H01L23/522 , H01L23/367
CPC classification number: H01L23/49503 , H01L23/3107 , H01L23/3677 , H01L23/5226 , H01L23/525 , H01L23/5389 , H01L24/09 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/12105 , H01L2224/24195 , H01L2924/10252 , H01L2924/10253 , H01L2924/10329 , H01L2924/14 , H01L2924/1431 , H01L2924/1432 , H01L2924/1433 , H01L2924/1434 , H01L2924/15172 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H01L2924/3025 , H01L2924/3511 , H01L2924/37001
Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole and having a passive component disposed in the first connection member; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed therein and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the passive component is electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.
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