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    PROGRAMMABLE CLOCK DIVIDER FOR RADIO FREQUENCY (RF) MIXERS
    4.
    发明申请
    PROGRAMMABLE CLOCK DIVIDER FOR RADIO FREQUENCY (RF) MIXERS 有权

    公开(公告)号：US20240413962A1

    公开(公告)日：2024-12-12

    申请号：US18333217

    申请日：2023-06-12

    Applicant: QUALCOMM Incorporated

    Inventor： Dongmin Park ,  Dongling Pan ,  Yiwu Tang

    IPC: H04L7/00 ,  H03K3/037 ,  H03K21/02

    Abstract: This disclosure provides systems, methods, and devices for wireless communications that support configurable clock dividers for mixer operation in a radio frequency front end (RFFE). In a first aspect, an apparatus for wireless communications includes a first clock loop comprising a first plurality of latches generating a first plurality of clock signals with a corresponding first plurality of phases; and a second clock loop comprising a second plurality of latches generating a second plurality of clock signals with a corresponding second plurality of phases, wherein the first clock loop is configured to be enabled or disabled based on a first enable signal, and wherein the second clock loop is configured to be enabled or disabled based on a second enable signal. Other aspects and features are also claimed and described.

    RADIO FREQUENCY (RF) FRONT END HAVING MULTIPLE LOW NOISE AMPLIFIER MODULES
    7.
    发明申请
    RADIO FREQUENCY (RF) FRONT END HAVING MULTIPLE LOW NOISE AMPLIFIER MODULES 有权
    具有多个低噪声放大器模块的无线电频率（RF）前端

    公开(公告)号：US20150333941A1

    公开(公告)日：2015-11-19

    申请号：US14671939

    申请日：2015-03-27

    Applicant: QUALCOMM Incorporated

    Inventor： Dongling Pan ,  Aleksandar Miodrag Tasic ,  Rajagopalan Rangarajan ,  Lai Kan Leung ,  Chiewcharn Narathong ,  Yiwu Tang

    IPC: H04L27/06 ,  H04B7/26 ,  H04B1/10

    CPC classification number: H04L27/063 ,  H04B1/005 ,  H04B1/10 ,  H04B7/26

    Abstract: A radio frequency (RF) front end having multiple low noise amplifiers modules is disclosed. In an exemplary embodiment, an apparatus includes at least one first stage amplifier configured to amplify received carrier signals to generate at least one first stage carrier group. Each first stage carrier group includes a respective portion of the carrier signals. The apparatus also includes second stage amplifiers configured to amplify the first stage carrier groups. Each second stage amplifier configured to amplify a respective first stage carrier group to generate two second stage output signals that may be output to different demodulation stages where each demodulation stage demodulates a selected carrier signal.

    Abstract translation: 公开了具有多个低噪声放大器模块的射频（RF）前端。 在示例性实施例中，装置包括至少一个第一级放大器，其配置成放大接收的载波信号以产生至少一个第一级载波组。 每个第一级载波组包括载波信号的相应部分。 该装置还包括配置成放大第一级载波组的第二级放大器。 每个第二级放大器被配置为放大相应的第一级载波组以产生两个第二级输出信号，其可以被输出到不同的解调级，其中每个解调级解调所选择的载波信号。

    On-Chip Test Tone Generator for Built-In Spur Testing
    8.
    发明申请
    On-Chip Test Tone Generator for Built-In Spur Testing 有权

    公开(公告)号：US20240421918A1

    公开(公告)日：2024-12-19

    申请号：US18337256

    申请日：2023-06-19

    Applicant: Qualcomm Incorporated

    Inventor： Shilei Hao ,  Dongling Pan ,  Rui Xu ,  Yiwu Tang

    IPC: H04B17/00 ,  H03L7/099

    Abstract: An apparatus is disclosed that implements an on-chip test tone generator for built-in spur testing. In an example aspect, the apparatus includes an integrated circuit with a test tone generator, at least one reference signal generator, and at least one signal propagation path. The test tone generator includes an amplitude control circuit. The at least one signal propagation path includes a transceiver path, a mixer, and a switch. The transceiver path is configured to be coupled to an antenna. The mixer has a first input coupled to the at least one reference signal generator. The switch is configured to selectively couple a second input of the mixer to the transceiver path or the amplitude control circuit of the at least one test tone generator.

    DUAL STAGE LOW NOISE AMPLIFIER FOR MULTIBAND RECEIVER
    10.
    发明申请
    DUAL STAGE LOW NOISE AMPLIFIER FOR MULTIBAND RECEIVER 有权
    双级接收机的双级低噪声放大器

    公开(公告)号：US20160087587A1

    公开(公告)日：2016-03-24

    申请号：US14491833

    申请日：2014-09-19

    Applicant: QUALCOMM Incorporated

    Inventor： Chuan Wang ,  Dongling Pan ,  Wing Fat Andy Lau ,  Jorge Andres Garcia ,  Zixiang Yang

    IPC: H03F1/02 ,  H03F1/26 ,  H03F3/19

    CPC classification number: H03F3/195 ,  H03F1/0205 ,  H03F1/26 ,  H03F1/56 ,  H03F3/19 ,  H03F3/211 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/541 ,  H03F2203/21109 ,  H04B1/005

    Abstract: A dual stage LNA for use in multiband receivers is disclosed. In an exemplary embodiment, an apparatus includes a plurality of first stage amplifiers having a plurality of first stage output ports, respectively, to output first stage amplified voltage mode signals. The apparatus also includes a plurality of second stage amplifiers having a plurality of second stage input ports, respectively, and second stage output ports to output amplified current mode signals. The apparatus also includes a switch apparatus having input terminals connected to the first stage output ports and output terminals connected to the second stage input ports, the switch apparatus to connect selected second stage input ports to selected first stage output ports.

    Abstract translation: 公开了一种用于多频带接收机的双级LNA。 在示例性实施例中，装置包括分别具有多个第一级输出端口的多个第一级放大器，用于输出第一级放大的电压模式信号。 该装置还包括分别具有多个第二级输入端口的多个第二级放大器和用于输出放大的电流模式信号的第二级输出端口。 该装置还包括具有连接到第一级输出端口的输入端子和连接到第二级输入端口的输出端子的开关装置，该开关装置将所选择的第二级输入端口连接到所选择的第一级输出端口。

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