Variable resistance nonvolatile memory device including a variable resistance layer that changes reversibly between a low resistance state and a high resistance state according to an applied electrical signal
    2.
    发明授权
    Variable resistance nonvolatile memory device including a variable resistance layer that changes reversibly between a low resistance state and a high resistance state according to an applied electrical signal 有权
    可变电阻非易失性存储装置包括根据所施加的电信号在低电阻状态和高电阻状态之间可逆地改变的可变电阻层

    公开(公告)号:US09336881B2

    公开(公告)日:2016-05-10

    申请号:US14730629

    申请日:2015-06-04

    Abstract: A variable resistance nonvolatile memory device includes: a nonvolatile memory element; an NMOS transistor connected to the nonvolatile memory element; a source line connected to the NMOS transistor; a bit line connected to the nonvolatile memory element. When a control circuit causes the nonvolatile memory element to be in the low resistance state, the control circuit controls to flow a first current from a first voltage source to a reference potential point, and applies a first gate voltage to a gate of a NMOS transistor, and when the control circuit causes the nonvolatile memory element to be in the high resistance state, the control circuit controls to flow a second current from a second voltage source to the reference potential point, and applies a second gate voltage to the gate of the NMOS transistor, the second gate voltage being lower than the first gate voltage.

    Abstract translation: 一种可变电阻非易失性存储器件包括:非易失性存储元件; 连接到非易失性存储元件的NMOS晶体管; 连接到NMOS晶体管的源极线; 连接到非易失性存储元件的位线。 当控制电路使非易失性存储元件处于低电阻状态时,控制电路控制第一电流从第一电压源流向基准电位点,并将第一栅极电压施加到NMOS晶体管的栅极 并且当控制电路使非易失性存储元件处于高电阻状态时,控制电路控制将第二电流从第二电压源流向基准电位点,并将第二栅极电压施加到栅极 NMOS晶体管,第二栅极电压低于第一栅极电压。

    Cross-point variable resistance nonvolatile memory device
    3.
    发明授权
    Cross-point variable resistance nonvolatile memory device 有权
    交叉点可变电阻非易失性存储器件

    公开(公告)号:US09053788B2

    公开(公告)日:2015-06-09

    申请号:US14122714

    申请日:2013-03-27

    Abstract: A cross-point memory device including memory cells each includes: a variable resistance element that reversibly changes at least between a low resistance state and a high resistance state; and a current steering element that has nonlinear current-voltage characteristics, and the cross-point memory device comprises a read circuit which includes: a reference voltage generation circuit which comprises at least the current steering element; a differential amplifier circuit which performs current amplification on an output voltage in the reference voltage generation circuit; a feedback controlled bit line voltage clamp circuit which sets the low voltage side reference voltage to increase with an output of the differential amplifier circuit; and a sense amplifier circuit which determines a resistance state of a selected memory cell according to an amount of current flowing through the selected memory cell.

    Abstract translation: 包括存储单元的交叉点存储器件每个都包括:至少在低电阻状态和高电阻状态之间可逆地改变的可变电阻元件; 以及具有非线性电流 - 电压特性的电流导向元件,并且所述交叉点存储器件包括读取电路,所述读取电路包括:至少包括所述电流转向元件的参考电压产生电路; 对基准电压产生电路中的输出电压进行电流放大的差分放大电路; 反馈控制的位线电压钳位电路,其利用差分放大器电路的输出设定低电压侧参考电压增加; 以及读出放大器电路,其根据流过选择的存储单元的电流量来确定所选存储单元的电阻状态。

    Semiconductor device including memory cell and sense amplifer, and IC card including semiconductor device
    4.
    发明授权
    Semiconductor device including memory cell and sense amplifer, and IC card including semiconductor device 有权
    包括存储单元和感测放大器的半导体器件,以及包括半导体器件的IC卡

    公开(公告)号:US09543007B2

    公开(公告)日:2017-01-10

    申请号:US15166152

    申请日:2016-05-26

    Abstract: A semiconductor device includes a memory cell; circuitry that generates a reference voltage; and a sense amplifier including a first input terminal electrically connected to the memory cell, and a second input terminal electrically connected to the circuitry. The sense amplifier obtains a value in correlation with a resistance value of the memory cell based on a comparison between a sense voltage applied to the first input terminal and the reference voltage applied to the second input terminal. The sense voltage changes at a speed in correlation with the resistance value of the memory cell. In at least part of a period during which the sense voltage changes, the circuitry causes the reference voltage to change in a direction opposite to a direction in which the sense voltage changes.

    Abstract translation: 半导体器件包括存储单元; 产生参考电压的电路; 以及读出放大器,包括电连接到存储单元的第一输入端子和电连接到该电路的第二输入端子。 感测放大器基于施加到第一输入端子的感测电压和施加到第二输入端子的参考电压之间的比较,获得与存储器单元的电阻值相关的值。 感测电压以与存储器单元的电阻值相关的速度变化。 在感测电压变化的周期的至少一部分期间,电路使得参考电压在与感测电压变化的方向相反的方向上改变。

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