公开(公告)号：US09960151B2

公开(公告)日：2018-05-01

申请号：US15226905

申请日：2016-08-02

Applicant: Novatek Microelectronics Corp.

Inventor： Chieh-Hsiang Chang ,  Wen-Ching Huang ,  Kuo-Yuan Lu ,  Huang-Chin Tang

IPC: G02F1/1345 ,  H01L25/16 ,  H01L23/498 ,  H01L23/00 ,  H01L23/552 ,  H01L23/373

CPC classification number: H01L25/167 ,  G02F1/13452 ,  G02F1/13458 ,  H01L23/373 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/552 ,  H01L23/562 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/1403 ,  H01L2224/16165

Abstract: A semiconductor device includes a chip, a plurality of first bumps, and a plurality of second bumps. The chip includes an active surface. The first bumps are disposed on the active surface along a first direction. The second bumps are disposed on the active surface along a second direction parallel to the first direction, wherein one of the second bumps is located between adjacent two of the first bumps, a closest distance from the second bumps to the fan-out region is smaller than a closest distance from the first bumps to the fan-out region, and a first width of one of the first bumps is larger than a second width of one of the second bumps.

公开(公告)号：US20180040596A1

公开(公告)日：2018-02-08

申请号：US15226905

申请日：2016-08-02

Applicant: Novatek Microelectronics Corp.

Inventor： Chieh-Hsiang Chang ,  Wen-Ching Huang ,  Kuo-Yuan Lu ,  Huang-Chin Tang

IPC: H01L25/16 ,  H01L23/373 ,  H01L23/552 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L25/167 ,  G02F1/13452 ,  G02F1/13458 ,  H01L23/373 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/552 ,  H01L23/562 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/1403 ,  H01L2224/16165

Abstract: A semiconductor device includes a chip, a plurality of first bumps, and a plurality of second bumps. The chip includes an active surface. The first bumps are disposed on the active surface along a first direction. The second bumps are disposed on the active surface along a second direction parallel to the first direction, wherein one of the second bumps is located between adjacent two of the first bumps, a closest distance from the second bumps to the fan-out region is smaller than a closest distance from the first bumps to the fan-out region, and a first width of one of the first bumps is larger than a second width of one of the second bumps.

公开(公告)号：US20150325537A1

公开(公告)日：2015-11-12

申请号：US14697631

申请日：2015-04-28

Applicant: Novatek Microelectronics Corp.

Inventor： Kuo-Yuan Lu ,  Wen-Ping Chou ,  Yung-Sheng Chen

IPC: H01L23/00 ,  H01L23/528 ,  H01L23/532 ,  H01L23/31

CPC classification number: H01L24/13 ,  H01L23/3171 ,  H01L23/525 ,  H01L23/528 ,  H01L23/5286 ,  H01L23/53209 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53242 ,  H01L23/53252 ,  H01L24/05 ,  H01L2224/0235 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05582 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/13005 ,  H01L2224/13007 ,  H01L2224/13009 ,  H01L2224/13016 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/13028 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/14 ,  H01L2924/2064 ,  H01L2924/00014 ,  H01L2924/2075 ,  H01L2924/20751

Abstract: An integrated circuit (IC) is provided. The IC includes a chip, a passivation layer, a first metal internal connection, a routing wire and a bonding area. The passivation layer is disposed on the chip, wherein the passivation layer has a first opening. The first metal internal connection is disposed under the passivation layer and disposed in the chip. The routing wire is disposed on the passivation layer, wherein a first end of the routing wire electrically connects to a first end of the first metal internal connection through the first opening of the passivation layer. The bonding area is disposed on the passivation layer, wherein the bonding area electrically connects to a second end of the routing wire.

Abstract translation: 提供集成电路（IC）。 IC包括芯片，钝化层，第一金属内部连接，布线和接合区域。 钝化层设置在芯片上，其中钝化层具有第一开口。 第一金属内部连接设置在钝化层下方并设置在芯片中。 路由线设置在钝化层上，其中路由线的第一端通过钝化层的第一开口电连接到第一金属内部连接的第一端。 接合区域设置在钝化层上，其中接合区域电连接到布线线的第二端。