-
公开(公告)号：US10078998B2
公开(公告)日：2018-09-18
申请号：US14819436
申请日：2015-08-06
Applicant: Novatek Microelectronics Corp.
Inventor： Po-Shen Chu , Chun-Ta Wu , Hong-Jun Hsiao , Chieh-Hsiang Chang , Feng-Jung Kuo
CPC classification number: G09G5/02 , G09G5/10 , G09G2320/0666 , G09G2320/0673 , G09G2320/0693
Abstract: A gamma curve and a color coordinate adjusting apparatus and method are provided. The method includes: receiving a display image and generating a color analyzing data, wherein the color analyzing data comprises a plurality of stimulus values respectively corresponding to a plurality of driven gray levels; receiving a target color coordinate value and a target luminance value; operating a searching operation according to a setting range on the color analyzing data, calculating a simulation color coordinate value and a simulation luminance value according to the stimulus values of each of the driven voltage levels, and obtaining a plurality of adjusted node information for the gamma curve and the color coordinate according to a difference between the target color coordinate value and the simulation color coordinate value and a difference between the target luminance value and the simulation luminance value corresponding to each of the driven voltage levels.
-
公开(公告)号：US20220148505A1
公开(公告)日：2022-05-12
申请号：US17519592
申请日：2021-11-05
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chieh-Hsiang Chang , Wen-Pin Tsai
IPC: G09G3/3233
Abstract: A method for a driver circuit configured to drive a display panel includes steps of: outputting a plurality of control signals according to a first control timing scheme to control a multiplexing circuit comprising a plurality of switches disposed in the display panel in a first operation mode; and outputting the plurality of control signals according to a second control timing scheme to control the multiplexing circuit in a second operation mode. Wherein, the first control timing scheme comprises a pre-charge period in which the plurality of switches of the multiplexing circuit are turned on, and the second control timing scheme comprises no pre-charge period.
-
公开(公告)号：US20190173457A1
公开(公告)日：2019-06-06
申请号：US15828618
申请日：2017-12-01
Applicant: NOVATEK MICROELECTRONICS CORP.
Inventor： Chien-Chuan Huang , Chia-Hsin Tung , Chun-Hung Chen , Hao-Jan Yang , Chieh-Hsiang Chang
CPC classification number: H03K5/00006 , G06F1/10 , G09G3/2096 , G09G5/005 , G09G5/18 , H03K5/131 , H03K5/135
Abstract: A display driving circuit, a calibration module, and an associated calibration method are provided. The display driving circuit includes an internal clock circuit and the calibration module. The internal clock circuit generates an internal clock signal. The calibration module includes a counting circuit and a trimming circuit. The counting circuit counts pulses of a reference clock signal to generate a detected reference-clock count and counts pulses of the internal clock signal to generate a detected internal-clock count. The trimming circuit generates a calibration signal to adjust frequency of the internal clock signal when a predefined condition is satisfied. The predefined condition is related to comparison between a first preset count and one of the detected reference-clock count and the detected internal-clock count.
-
公开(公告)号：US11145257B2
公开(公告)日：2021-10-12
申请号：US16779662
申请日：2020-02-02
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chieh-Hsiang Chang , Shih-Hsiang Pan , Chi-Hung Lin , Wen-Pin Tsai , Huang-Chin Tang
IPC: G09G3/3291 , G09G3/3233
Abstract: A display device driving method, suitable for a driver circuit, includes the following steps: determining magnitude of a plurality of data voltages according to received display data, and the plurality of data voltages are configured to be transmitted to a plurality of pixel circuits via a plurality of data lines; comparing the magnitude of the plurality of data voltages to generate a comparison result; and before providing corresponding ones of the plurality of data voltages to a first pixel group arranged at an i-th row of the plurality of pixel circuits, providing a first reset voltage having a value determined according to the comparison result to the plurality of data lines, or providing a second reset voltage to m data lines selected according to the comparison result from the plurality of data lines, i is a positive integer, and m is an integer.
-
公开(公告)号：US09960151B2
公开(公告)日：2018-05-01
申请号：US15226905
申请日：2016-08-02
Applicant: Novatek Microelectronics Corp.
Inventor： Chieh-Hsiang Chang , Wen-Ching Huang , Kuo-Yuan Lu , Huang-Chin Tang
IPC: G02F1/1345 , H01L25/16 , H01L23/498 , H01L23/00 , H01L23/552 , H01L23/373
CPC classification number: H01L25/167 , G02F1/13452 , G02F1/13458 , H01L23/373 , H01L23/49838 , H01L23/4985 , H01L23/552 , H01L23/562 , H01L24/14 , H01L24/16 , H01L2224/1403 , H01L2224/16165
Abstract: A semiconductor device includes a chip, a plurality of first bumps, and a plurality of second bumps. The chip includes an active surface. The first bumps are disposed on the active surface along a first direction. The second bumps are disposed on the active surface along a second direction parallel to the first direction, wherein one of the second bumps is located between adjacent two of the first bumps, a closest distance from the second bumps to the fan-out region is smaller than a closest distance from the first bumps to the fan-out region, and a first width of one of the first bumps is larger than a second width of one of the second bumps.
-
Patent Agency Ranking
公开(公告)号：US20180040596A1
公开(公告)日：2018-02-08
申请号：US15226905
申请日：2016-08-02
Applicant: Novatek Microelectronics Corp.
Inventor： Chieh-Hsiang Chang , Wen-Ching Huang , Kuo-Yuan Lu , Huang-Chin Tang
IPC: H01L25/16 , H01L23/373 , H01L23/552 , H01L23/498 , H01L23/00
CPC classification number: H01L25/167 , G02F1/13452 , G02F1/13458 , H01L23/373 , H01L23/49838 , H01L23/4985 , H01L23/552 , H01L23/562 , H01L24/14 , H01L24/16 , H01L2224/1403 , H01L2224/16165
Abstract: A semiconductor device includes a chip, a plurality of first bumps, and a plurality of second bumps. The chip includes an active surface. The first bumps are disposed on the active surface along a first direction. The second bumps are disposed on the active surface along a second direction parallel to the first direction, wherein one of the second bumps is located between adjacent two of the first bumps, a closest distance from the second bumps to the fan-out region is smaller than a closest distance from the first bumps to the fan-out region, and a first width of one of the first bumps is larger than a second width of one of the second bumps.
-
7.发明公开公开(公告)号：US20230282175A1
公开(公告)日：2023-09-07
申请号：US18197111
申请日：2023-05-15
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chieh-Hsiang Chang
IPC: G09G3/3291
CPC classification number: G09G3/3291 , G09G2310/0297 , G09G2330/021 , G09G2310/0291 , G09G2310/027
Abstract: A display driver circuit is configured to drive a display panel having a multiplexer. A method for the display driver circuit includes steps of: sending, by the display driver circuit a plurality of first data voltages to the display panel through a switch of the multiplexer; and outputting, by the display driver circuit a control signal to the switch during a first period in which the plurality of first data voltages sent through the switch remain unchanged wherein the control signal controls the switch to be turned on and keep in a conducted status until the display driver circuit sends a second data voltage different from the plurality of unchanged first data voltages through the switch.
-
公开(公告)号：US11651741B2
公开(公告)日：2023-05-16
申请号：US17673807
申请日：2022-02-17
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chieh-Hsiang Chang
IPC: G09G3/3291
CPC classification number: G09G3/3291 , G09G2310/027 , G09G2310/0291 , G09G2310/0297 , G09G2330/021
Abstract: A method for a display driver circuit configured to drive a display panel includes steps of: determining whether a plurality of first data codes corresponding to first data voltages to be output through a multiplexer to data lines in the display panel during a first horizontal line period equal; determining whether each of the first data codes equals a corresponding second data code among a plurality of second data codes corresponding to second data voltages to be output through the multiplexer to the data lines during a second horizontal line period immediately after the first horizontal line period; and in response to that the first data codes equal and each of the first data codes equal the corresponding second data code, outputting a control signal to keep a switch of the multiplexer staying in a turn-on state after the switch is turned on for outputting a first data voltage.
-
公开(公告)号：US10355679B2
公开(公告)日：2019-07-16
申请号：US15828618
申请日：2017-12-01
Applicant: NOVATEK MICROELECTRONICS CORP.
Inventor： Chien-Chuan Huang , Chia-Hsin Tung , Chun-Hung Chen , Hao-Jan Yang , Chieh-Hsiang Chang
Abstract: A display driving circuit, a calibration module, and an associated calibration method are provided. The display driving circuit includes an internal clock circuit and the calibration module. The internal clock circuit generates an internal clock signal. The calibration module includes a counting circuit and a trimming circuit. The counting circuit counts pulses of a reference clock signal to generate a detected reference-clock count and counts pulses of the internal clock signal to generate a detected internal-clock count. The trimming circuit generates a calibration signal to adjust frequency of the internal clock signal when a predefined condition is satisfied. The predefined condition is related to comparison between a first preset count and one of the detected reference-clock count and the detected internal-clock count.
-
公开(公告)号：US12087239B2
公开(公告)日：2024-09-10
申请号：US18197111
申请日：2023-05-15
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chieh-Hsiang Chang
IPC: G09G3/3291
CPC classification number: G09G3/3291 , G09G2310/027 , G09G2310/0291 , G09G2310/0297 , G09G2330/021
Abstract: A display driver circuit is configured to drive a display panel having a multiplexer. A method for the display driver circuit includes steps of: sending, by the display driver circuit, a plurality of first data voltages to the display panel through a switch of the multiplexer; and outputting, by the display driver circuit, a control signal to the switch during a first period in which the plurality of first data voltages sent through the switch remain unchanged, wherein the control signal controls the switch to be turned on and keep in a conducted status until the display driver circuit sends a second data voltage different from the plurality of unchanged first data voltages through the switch.
-
-
-
-
-
-
-
-
-
Search Results
13
records
(took 0.028 seconds)
