公开(公告)号：US11481015B2

公开(公告)日：2022-10-25

申请号：US16452012

申请日：2019-06-25

Applicant: NXP B.V.

Inventor： Siamak Delshadpour ,  Abhijeet Chandrakant Kulkarni ,  Hans de Kuyper ,  Cornelis Johannes Speelman

IPC: G06F1/3234 ,  G06F1/3206 ,  H04L25/02 ,  H04L25/03

Abstract: A redriver chip includes a controller and a plurality of circuits coupled to the channel. The controller adjusts a set of parameters of the plurality of circuits to have first values during a first mode of operation and second values during a second mode of operation. The first values generate a first level of power consumption during the first mode of operation, and the second values generate a second level of power consumption during the second mode of operation. The first level of power consumption is lower than the second level of power consumption, and the first mode of operation corresponding to a low-power mode of the redriver chip.

公开(公告)号：US11457524B2

公开(公告)日：2022-09-27

申请号：US16397709

申请日：2019-04-29

Applicant: NXP B.V.

Inventor： Mahmoud Mohamed Amin El Sabbagh ,  Anu Mathew ,  Siamak Delshadpour

IPC: H05K1/02

Abstract: A chip includes a plurality of ground conductors that at least partially surround a signal conductor on a same die. The signal conductor carries an interface (e.g., high speed) signal, and the ground conductors filter electromagnetic interference generated by the signal carried by the signal conductor. A chip package includes a plurality of ground pins around a signal pin that carries an interface signal. The ground pins filter electromagnetic interference generated by the signal carried by the signal pin. A printed circuit board includes a plurality of ground conductors around a signal line. The ground conductors are in vias and filter electromagnetic interference generated by an interface signal carried by the signal line.

公开(公告)号：US11038346B1

公开(公告)日：2021-06-15

申请号：US16731785

申请日：2019-12-31

Applicant: NXP B.V.

Inventor： Siamak Delshadpour ,  Dolphin Abessolo Bidzo

IPC: H02H9/04 ,  H01L27/02

Abstract: An integrated circuit (IC) is disclosed. The IC includes a pin to electrically connect the IC to an external circuit and a transistor that includes a base, a collector and an emitter. The pin is coupled to an internal circuit that is configured to operate in a preselected operating frequency range. The base is coupled to the pin and a resistor is coupled between the base and the pin. The IC further includes an electrostatic discharge (ESD) rail coupled to the pin through a first ESD diode. A second ESD diode is coupled between the floating ESD rail and a power supply to provide a second ESD current sink path.

公开(公告)号：US10924307B1

公开(公告)日：2021-02-16

申请号：US16876691

申请日：2020-05-18

Applicant: NXP B.V.

Inventor： Xu Zhang ,  Siamak Delshadpour

IPC: H04L25/03 ,  H03K17/687 ,  H03K17/60

Abstract: A continuous time linear equalization (CTLE) circuit is disclosed. The CTLE circuit includes an input port, an output port, a first differential transistor pair coupled to the input port and the output port and a second differential transistor pair. The CTLE circuit further includes a first degenerative impedance circuit coupled between the first differential transistor pair and ground. The first degenerative impedance includes switchable components to vary impedance of the first degenerative impedance circuit. The CTLE circuit also includes a second degenerative impedance circuit coupled between the second differential transistor pair and ground. The second degenerative impedance includes switchable components to vary impedance of the second degenerative impedance circuit, wherein the resistive part of the impedance of the first degenerative impedance circuit is equal to the impedance of the second degenerative impedance circuit.

公开(公告)号：US20200153240A1

公开(公告)日：2020-05-14

申请号：US16184808

申请日：2018-11-08

Applicant: NXP B.V.

Inventor： Siamak Delshadpour ,  Xiaoqun Liu

IPC: H02H9/04

Abstract: Embodiments of overvoltage protection devices and a method for operating an overvoltage protection device are disclosed. In an embodiment, an overvoltage protection device includes a switch circuit connected between an input terminal from which an input voltage is received and an output terminal from which an output voltage is output and including multiple NMOS transistors and multiple PMOS transistors connected in series between the input terminal and the output terminal, a first voltage generation circuit configured to, generate a first voltage that is applied to the NMOS transistors and a second voltage that is applied to a body of each of the PMOS transistors, in response to the input voltage and a supply voltage, and a second voltage generation circuit configured to generate a third voltage that is applied to the PMOS transistors in response to the input voltage and the first voltage.

公开(公告)号：US09621138B1

公开(公告)日：2017-04-11

申请号：US14933442

申请日：2015-11-05

Applicant: NXP B.V.

Inventor： Xu Zhang ,  Siamak Delshadpour ,  Ahmad Yazdi

IPC: H03K5/12 ,  H03K5/01 ,  H03K19/0185 ,  H03K3/353

CPC classification number: H03K5/01 ,  H03K3/353 ,  H03K17/16 ,  H03K19/00361 ,  H03K19/018507 ,  H03K19/018585

Abstract: An apparatus includes a swing control circuit, a slew control circuit, and a driver circuit. The swing control circuit is configured and arranged to be powered by an input supply voltage, to receive an input data signal and, in response, to generate a first internal signal having a swing level corresponding to the input supply voltage. The slew control circuit, including a switched capacitor circuit, is configured and arranged to receive the first internal signal and, in response, to generate a second internal signal using the switched capacitor circuit that is configured to set a slew rate for the second internal signal. Further, the driver circuit is configured and arranged to receive the second internal signal and, in response, to generate an output signal that is based upon the swing level and the slew rate of the second internal signal.

公开(公告)号：US11533053B2

公开(公告)日：2022-12-20

申请号：US17032784

申请日：2020-09-25

Applicant: NXP B.V.

Inventor： Siamak Delshadpour ,  Xiaoqun Liu ,  Steven Daniel

IPC: H03K19/0185 ,  H03K19/09 ,  H03K5/24 ,  H03K5/15 ,  H03K7/06

Abstract: Various embodiments relate to an amplitude shift keying (ASK) demodulator for demodulating an input signal, including: a frequency filter configured to receive the input signal, wherein the frequency filter includes adjustable components configured to adjust the frequency response of the frequency filter; a rectifier configured to rectify an output of the frequency filter, wherein the rectifier includes an adjustable current source configured to adjust the current consumption of the rectifier; a reference signal generator configured to produce a reference signal; a current to voltage converter configured to convert the current of the rectified signal to a rectified voltage and to convert the current of the reference signal to a reference voltage; and a comparator configured to compare the rectified voltage to the reference voltage and to produce a demodulated output signal.

公开(公告)号：US11349463B2

公开(公告)日：2022-05-31

申请号：US17084494

申请日：2020-10-29

Applicant: NXP B.V.

Inventor： Siamak Delshadpour ,  Xu Zhang

IPC: H03F3/195 ,  H03K5/003 ,  H04L12/28 ,  H04L25/06 ,  H04L12/50 ,  H03K5/24

Abstract: A wideband buffer circuit and a wideband communication circuit that uses the wideband buffer circuit. The wideband buffer circuit includes first and second transistors deployed as a voltage buffer and connected to first and second input terminals, first and second parallel resistor-capacitor pairs connected to the first and second transistors, first and second cross-coupled transistors connected to the first and second parallel resistor-capacitor pairs and connected to first and second output terminals, and first and second current sources connected to the first and second cross-coupled transistors and a fixed voltage. The first transistor, the first parallel resistor-capacitor pair, the first cross-coupled transistor and the first current source are connected in series. The second transistor, the second parallel resistor-capacitor pair, the second cross-coupled transistor and the second current source are connected in series.

公开(公告)号：US11228314B1

公开(公告)日：2022-01-18

申请号：US17080791

申请日：2020-10-26

Applicant: NXP B.V.

Inventor： Siamak Delshadpour ,  Xueyang Geng

IPC: H03K19/0175 ,  H03K17/567 ,  H03K19/00 ,  H03K19/003 ,  H03K17/16

Abstract: A slew rate control circuit is disclosed. The slew rate control circuit includes an input port to receive an input signal, a transmitter to transmit the input signal to an output port and an impedance control circuit coupled between the transmitter and the output port. The impedance control circuit has an adjustable impedance that is configured to be adjusted during a rise and a fall of the input signal using a trim code and an one shot pulse.

公开(公告)号：US11206161B1

公开(公告)日：2021-12-21

申请号：US17022989

申请日：2020-09-16

Applicant: NXP B.V.

Inventor： Siamak Delshadpour ,  Cornelis Johannes Speelman ,  Stefan Kwaaitaal

IPC: H04L25/03 ,  H04L27/01

Abstract: An adaptive equalizer and automatic gain controller is disclosed. The adaptive equalizer and automatic gain controller includes a programmable continuous time linear equalizer (CTLE). The CTLE includes a control port to receive a control signal to adjust a frequency response of the CTLE. The adaptive equalizer and automatic gain controller also includes a power comparator coupled with an output of the CTLE and a controller coupled with the power comparator and the control port and configured to generate the control signal for the CTLE based on the output of the power comparator. The power comparator is configured to compare power of a low frequency part and a high frequency part of an output signal of the CTLE.