Integrated filter for de-sense reduction

    公开(公告)号:US11457524B2

    公开(公告)日:2022-09-27

    申请号:US16397709

    申请日:2019-04-29

    Applicant: NXP B.V.

    Abstract: A chip includes a plurality of ground conductors that at least partially surround a signal conductor on a same die. The signal conductor carries an interface (e.g., high speed) signal, and the ground conductors filter electromagnetic interference generated by the signal carried by the signal conductor. A chip package includes a plurality of ground pins around a signal pin that carries an interface signal. The ground pins filter electromagnetic interference generated by the signal carried by the signal pin. A printed circuit board includes a plurality of ground conductors around a signal line. The ground conductors are in vias and filter electromagnetic interference generated by an interface signal carried by the signal line.

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