MEMORY DEVICE INCLUDING HIGH-ASPECT-RATIO CONDUCTIVE CONTACTS

    公开(公告)号:US20230395512A1

    公开(公告)日:2023-12-07

    申请号:US17848021

    申请日:2022-06-23

    CPC classification number: H01L23/535 H01L23/5283 H01L27/11556 H01L27/11582

    Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes memory cells located on tiers; control gates for the memory cells and located on respective tiers; a dielectric structure over the control gates; a first conductive contact formed in the dielectric structure and contacting a first control gate, the first conductive contact having a first length; and a second conductive contact formed in the dielectric structure and contacting the second control gate, the second conductive contact having a second length unequal to the first length, wherein the second conductive contact includes a first portion and a second portion, the second portion is between the first portion and the second control gate, the first portion including a first region having a first width, the second portion including a second region having a second width, and the second width being greater than the first width.

    MICROELECTRONIC DEVICES INCLUDING SUPPORT PILLAR STRUCTURES, AND RELATED MEMORY DEVICES

    公开(公告)号:US20220367500A1

    公开(公告)日:2022-11-17

    申请号:US17816299

    申请日:2022-07-29

    Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulative structures, first support pillar structures extending through the stack structure within a first region of the microelectronic device, the first support pillar structures electrically isolated from a source structure underlying the stack structure, second support pillar structures extending through the stack structure within a second region of the microelectronic device, the second support pillar structures comprising an electrically conductive material in electrical communication with the source structure, and bridge structures extending between at least some neighboring first support pillar structures of the first support pillar structures. Related memory devices, electronic systems, and methods are also described.

    Microelectronic devices including staircase structures, and related memory devices and electronic systems

    公开(公告)号:US11424262B2

    公开(公告)日:2022-08-23

    申请号:US16821818

    申请日:2020-03-17

    Abstract: A microelectronic device comprises a stack structure, a stadium structure within the stack structure, a source tier underlying the stack structure, and a masking structure. The stack structure has tiers each comprising a conductive structure and an insulating structure. The stadium structure comprises a forward staircase structure, a reverse staircase structure, and a central region horizontally interposed between the forward staircase structure and the reverse staircase structure. The source tier comprises discrete conductive structures within horizontal boundaries of the central region of the stadium structure and horizontally separated from one another by dielectric material. The masking structure is confined within the horizontal boundaries of the central region of the stadium structure and is vertically interposed between the source tier and the stack structure. The masking structure comprises segments horizontally covering portions of the dielectric material horizontally interposed between the discrete conductive structures. Additional devices and electronic systems are also described.

    METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MEMORY DEVICES, AND ELECTRONIC SYSTEMS

    公开(公告)号:US20220181352A1

    公开(公告)日:2022-06-09

    申请号:US17652425

    申请日:2022-02-24

    Abstract: A method of forming a microelectronic device comprises forming a microelectronic device structure. The microelectronic device structure comprises a stack structure comprising insulative structures and additional insulative structures vertically alternating with the insulative structures, a dielectric structure vertically extending partially through the stack structure, and a dielectric material vertically overlying and horizontally extending across the stack structure and the dielectric structure. Portions of at least the dielectric material and the dielectric structure are removed to form a trench vertically overlying and at least partially horizontally overlapping a remaining portion of the dielectric structure. The trench is substantially filled with additional dielectric material. Microelectronic devices, memory devices, and electronic systems are also described.

    MICROELECTRONIC DEVICES INCLUDING STAIRCASE STRUCTURES, AND RELATED MEMORY DEVICES, ELECTRONIC SYSTEMS, AND METHODS

    公开(公告)号:US20210265371A1

    公开(公告)日:2021-08-26

    申请号:US16799543

    申请日:2020-02-24

    Abstract: A microelectronic device comprises a stack structure comprising vertically alternating conductive structures and insulating structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulating structures, a staircase structure within the stack structure and having steps comprising edges of at least some of the tiers, conductive contact structures on the steps of the staircase structure, support pillar structures laterally offset in at least a first direction from the conductive contact structures and extending through the stack structure, and bridge structures comprising an electrically insulating material extending vertically through at least a portion of the stack structure and between at least some adjacent support pillar structures of the support pillar structures. Related memory devices, electronic systems, and methods are also described.

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