公开(公告)号：US20240339543A1

公开(公告)日：2024-10-10

申请号：US18743686

申请日：2024-06-14

申请人： Micron Technology, Inc.

发明人： Witold Kula ,  Gurtej S. Sandhu ,  John A. Smythe

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L29/24 ,  H01L29/66 ,  H10B99/00

CPC分类号： H01L29/78642 ,  H01L21/02178 ,  H01L21/02488 ,  H01L21/02568 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78645 ,  H01L29/78696 ,  H10B99/00 ,  H01L21/0262

摘要： An apparatus including an array of memory cells comprising transistors is disclosed. One or more of the transistors comprise a crystalline material extending substantially transverse to a base material. A gate dielectric material is adjacent to the crystalline material. A two-dimensional material of a channel region directly intervenes between the gate dielectric material and the crystalline material. The gate dielectric material overlies additional portions of the two-dimensional material of the channel region. One or more gates are adjacent to the gate dielectric material. An electronic device is also disclosed comprising one or more of the transistors. The one or more of the transistors comprise a channel region, a gate dielectric region adjacent to the channel region, and one or more gates adjacent to the gate dielectric region. The channel region comprises opposing sidewalls separated by a pillar structure and substantially perpendicular to a base material.

公开(公告)号：US11515198B2

公开(公告)日：2022-11-29

申请号：US16941311

申请日：2020-07-28

申请人： Micron Technology, Inc.

发明人： Gurtej S. Sandhu ,  Scott L. Light ,  John A. Smythe ,  Sony Varghese

IPC分类号： H01L21/70 ,  H01L21/762 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/06 ,  G03F7/075 ,  G03F7/038 ,  G03F7/039 ,  G03F7/20 ,  G03F7/30 ,  G03F7/023 ,  H01L21/311

摘要： Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation. Subsequently, the photopatternable dielectric material is developed to pattern the photopatternable dielectric material into a first dielectric structure which at least partially fills the opening, and to remove the photopatternable dielectric material from over the upper surface.

公开(公告)号：US20200295011A1

公开(公告)日：2020-09-17

申请号：US16353343

申请日：2019-03-14

申请人： Micron Technology, Inc.

发明人： Gurtej S. Sandhu ,  John A. Smythe

IPC分类号： H01L27/108

摘要： A method used in forming integrated circuitry comprises forming a plurality of conductive vias comprising conductive material. The conductive vias are spaced relative one another by intermediate material. A discontinuous material is formed atop the conductive material of the vias and atop the intermediate material that is between the vias. Metal material is formed atop, directly against, and between the discontinuous material and atop and directly against the conductive material of the vias. The metal material is of different composition from that of the discontinuous material and is above the intermediate material that is between the vias. The metal material with discontinuous material there-below is formed to comprise a conductive line that is atop the intermediate material that is between the vias and is directly against individual of the vias. Structures independent of method are disclosed.

公开(公告)号：US10777562B1

公开(公告)日：2020-09-15

申请号：US16353343

申请日：2019-03-14

申请人： Micron Technology, Inc.

发明人： Gurtej S. Sandhu ,  John A. Smythe

IPC分类号： H01L27/24 ,  H01L27/108

摘要： A method used in forming integrated circuitry comprises forming a plurality of conductive vias comprising conductive material. The conductive vias are spaced relative one another by intermediate material. A discontinuous material is formed atop the conductive material of the vias and atop the intermediate material that is between the vias. Metal material is formed atop, directly against, and between the discontinuous material and atop and directly against the conductive material of the vias. The metal material is of different composition from that of the discontinuous material and is above the intermediate material that is between the vias. The metal material with discontinuous material there-below is formed to comprise a conductive line that is atop the intermediate material that is between the vias and is directly against individual of the vias. Structures independent of method are disclosed.

公开(公告)号：US20190206723A1

公开(公告)日：2019-07-04

申请号：US15858021

申请日：2017-12-29

申请人： Micron Technology, Inc.

发明人： Ken Tokashiki ,  John A. Smythe ,  Gurtej S. Sandhu

IPC分类号： H01L21/768

CPC分类号： H01L21/76804 ,  H01L21/30655 ,  H01L21/76205 ,  H01L21/76816 ,  H01L21/76831 ,  H01L21/76843

摘要： Methods of forming high aspect ratio openings. The method comprises removing a portion of a dielectric material at a temperature less than about 0° C. to form at least one opening in the dielectric material. The at least one opening comprises an aspect ratio of greater than about 30:1. A protective material is formed in the at least one opening and on sidewalls of the dielectric material at a temperature less than about 0° C. Methods of forming high aspect ratio features are also disclosed, as are semiconductor devices.

公开(公告)号：US20180337087A1

公开(公告)日：2018-11-22

申请号：US15598795

申请日：2017-05-18

申请人： Micron Technology, Inc.

发明人： Gurtej S. Sandhu ,  Scott L. Light ,  John A. Smythe ,  Sony Varghese

IPC分类号： H01L21/762 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/06 ,  G03F7/075 ,  G03F7/038 ,  G03F7/039 ,  G03F7/20 ,  G03F7/30

CPC分类号： H01L21/76224 ,  G03F7/038 ,  G03F7/039 ,  G03F7/0757 ,  G03F7/20 ,  G03F7/30 ,  H01L21/02118 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02189 ,  H01L21/02345 ,  H01L21/31053 ,  H01L21/31058 ,  H01L29/0649

摘要： Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation. Subsequently, the photopatternable dielectric material is developed to pattern the photopatternable dielectric material into a first dielectric structure which at least partially fills the opening, and to remove the photopatternable dielectric material from over the upper surface.

公开(公告)号：US09865456B1

公开(公告)日：2018-01-09

申请号：US15235365

申请日：2016-08-12

申请人： Micron Technology, Inc.

发明人： Sumeet C. Pandey ,  Brenda D. Kraus ,  Stefan Uhlenbrock ,  John A. Smythe ,  Timothy A. Quick

IPC分类号： H01L21/02

CPC分类号： H01L21/0228 ,  H01L21/0217 ,  H01L21/02274

摘要： Methods of forming silicon nitride. Silicon nitride is formed on a substrate by atomic layer deposition at a temperature of less than or equal to about 275° C. The as-formed silicon nitride is exposed to a plasma. The silicon nitride may be formed as a portion of silicon nitride and at least one other portion of silicon nitride. The portion of silicon nitride and the at least one other portion of silicon nitride may be exposed to a plasma treatment. Methods of forming a semiconductor structure are also disclosed, as are semiconductor structures and silicon precursors.

公开(公告)号：US11715692B2

公开(公告)日：2023-08-01

申请号：US16990580

申请日：2020-08-11

申请人： Micron Technology, Inc.

发明人： John D. Hopkins ,  Jordan D. Greenlee ,  Francois H. Fabreguette ,  John A. Smythe

IPC分类号： H01L23/528 ,  H01L23/522 ,  H01L21/768 ,  H01L23/535 ,  H01L23/532 ,  H10B41/27 ,  H10B41/35 ,  H10B43/27 ,  H10B43/35

CPC分类号： H01L23/5286 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76895 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/535 ,  H01L23/53266 ,  H10B41/27 ,  H10B41/35 ,  H10B43/27 ,  H10B43/35

摘要： A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and conductive rails laterally adjacent to the conductive structures of the stack structure. The conductive rails comprise a material composition that is different than a material composition of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US11411008B2

公开(公告)日：2022-08-09

申请号：US16992402

申请日：2020-08-13

申请人： Micron Technology, inc.

发明人： Gurtej S. Sandhu ,  John A. Smythe

IPC分类号： H01L23/52 ,  H01L27/108

摘要： A method used in forming integrated circuitry comprises forming a plurality of conductive vias comprising conductive material. The conductive vias are spaced relative one another by intermediate material. A discontinuous material is formed atop the conductive material of the vias and atop the intermediate material that is between the vias. Metal material is formed atop, directly against, and between the discontinuous material and atop and directly against the conductive material of the vias. The metal material is of different composition from that of the discontinuous material and is above the intermediate material that is between the vias. The metal material with discontinuous material there-below is formed to comprise a conductive line that is atop the intermediate material that is between the vias and is directly against individual of the vias. Structures independent of method are disclosed.

公开(公告)号：US20210408297A1

公开(公告)日：2021-12-30

申请号：US17447393

申请日：2021-09-10

申请人： Micron Technology, Inc.

发明人： Witold Kula ,  Gurtej S. Sandhu ,  John A. Smythe

IPC分类号： H01L29/786 ,  H01L29/24 ,  H01L27/105 ,  H01L21/02 ,  H01L29/66

摘要： A transistor comprising a channel region on a material is disclosed. The channel region comprises a two-dimensional material comprising opposing sidewalls and oriented perpendicular to the material. A gate dielectric is on the two-dimensional material and gates are on the gate dielectric. Semiconductor devices and systems including at least one transistor are disclosed, as well as methods of forming a semiconductor device.