公开(公告)号：US09991227B2

公开(公告)日：2018-06-05

申请号：US15385988

申请日：2016-12-21

Applicant: MediaTek Inc.

Inventor： Hsing-Chih Liu ,  Chia-Hao Yang ,  Ying-Chih Chen

IPC: H01L23/48 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L25/0655 ,  H01L23/49575 ,  H01L23/50 ,  H01L23/5221 ,  H01L23/528 ,  H01L23/5381 ,  H01L23/5386 ,  H01L24/05 ,  H01L24/06 ,  H01L24/09 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48138 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48479 ,  H01L2224/4903 ,  H01L2224/4909 ,  H01L2224/4911 ,  H01L2224/4912 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/4554

Abstract: A semiconductor package structure includes a base. A first die is mounted on the base. The first die includes a plurality of first pads arranged in a first tier, and a plurality of second pads arranged in a second tier. A second die is mounted on the base and includes a plurality of third pads with the first pad area, and a plurality of fourth pads with the second pad area, alternately arranged in a third tier. The second die also includes a first bonding wire having two terminals respectively coupled to one of the first pads and one of the fourth pads. The semiconductor package structure also includes a second bonding wire having two terminals respectively coupled to one of the third pads and one of the second pads.

公开(公告)号：US20150140939A1

公开(公告)日：2015-05-21

申请号：US14603367

申请日：2015-01-23

Applicant: MEDIATEK INC.

Inventor： Li-Chun Tu ,  Chia-Hao Yang ,  Tsung-Huang Chen

IPC: H04B1/40

CPC classification number: H04B1/40

Abstract: A wireless communication device including an integrated processing circuit and a first memory is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit, wherein the integrated processing circuit and the first memory are packaged in a single semiconductor package.

Abstract translation: 提供一种包括集成处理电路和第一存储器的无线通信装置。 集成处理电路包括能够处理无线通信信号的处理单元和能够执行射频（RF）信号和基带信号之间的转换的射频（RF）单元，其中无线通信信号是 RF信号和基带信号。 第一存储器耦合到集成处理电路。 第一存储器能够存储由处理单元使用的数据，其中集成处理电路和第一存储器封装在单个半导体封装中。

公开(公告)号：US20170055222A1

公开(公告)日：2017-02-23

申请号：US15344599

申请日：2016-11-07

Applicant: MEDIATEK INC.

Inventor： Li-Chun Tu ,  Chia-Hao Yang ,  Tsung-Huang Chen

IPC: H04W52/02 ,  G06F3/06

CPC classification number: H04W52/0261 ,  G06F3/0625 ,  G06F3/0659 ,  G06F3/067 ,  H04B1/40 ,  H04W88/06 ,  Y02D70/00 ,  Y02D70/26 ,  Y02D70/40

Abstract: A wireless communication device including an integrated processing circuit, a first memory and a testing circuit is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit. The testing circuit is coupled to the first memory, and is capable of testing the first memory for determining if the first memory is an effective memory. The RF unit is put in a first package, the first memory is put in a second package, and the first package and the second package are packaged in a single device.

Abstract translation: 提供一种包括集成处理电路，第一存储器和测试电路的无线通信设备。 集成处理电路包括能够处理无线通信信号的处理单元和能够执行射频（RF）信号和基带信号之间的转换的射频（RF）单元，其中无线通信信号是 RF信号和基带信号。 第一存储器耦合到集成处理电路。 第一存储器能够存储由处理单元使用的数据。 测试电路耦合到第一存储器，并且能够测试第一存储器以确定第一存储器是否是有效存储器。 将RF单元放入第一封装中，将第一存储器放入第二封装中，并将第一封装和第二封装封装在单个器件中。

公开(公告)号：US09129962B1

公开(公告)日：2015-09-08

申请号：US14271792

申请日：2014-05-07

Applicant: MediaTek Inc.

Inventor： Hsing-Chih Liu ,  Chia-Hao Yang ,  Ying-Chih Chen

IPC: H01L23/48 ,  H01L23/522 ,  H01L23/538 ,  H01L23/528 ,  H01L23/50 ,  H01L23/495

CPC classification number: H01L25/0655 ,  H01L23/49575 ,  H01L23/50 ,  H01L23/5221 ,  H01L23/528 ,  H01L23/5381 ,  H01L23/5386 ,  H01L24/05 ,  H01L24/06 ,  H01L24/09 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48138 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48479 ,  H01L2224/4903 ,  H01L2224/4909 ,  H01L2224/4911 ,  H01L2224/4912 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/4554

Abstract: The invention provides a semiconductor package structure. The semiconductor package structure includes a base. A first die is mounted on the base. The first die comprises a plurality of first pads with a first pad area arranged in a first tier. A plurality of second pads with a second pad area is arranged in a second tier. A second die is mounted on the base. The second die comprises a plurality of third pads with the first pad area and a plurality of fourth pads with the second pad area alternately arranged in a third tier. A first bonding wire has two terminals respectively coupled to one of the first pads and one of the fourth pads. A second bonding wire has two terminals respectively coupled to one of the third pads and one of the second pads.

Abstract translation: 本发明提供一种半导体封装结构。 半导体封装结构包括基底。 第一个模具安装在基座上。 第一管芯包括多个第一焊盘，第一焊盘区域布置在第一层中。 具有第二焊盘区域的多个第二焊盘被布置在第二层中。 第二个模具安装在基座上。 第二管芯包括具有第一焊盘区域的多个第三焊盘和具有第二焊盘区域的多个第四焊盘，其交替地布置在第三层中。 第一接合线具有分别耦合到第一焊盘之一和第四焊盘之一的两个端子。 第二接合线具有分别耦合到第三焊盘之一和第二焊盘之一的两个端子。

公开(公告)号：US20170243858A1

公开(公告)日：2017-08-24

申请号：US15588690

申请日：2017-05-07

Applicant: MEDIATEK INC.

Inventor： Che-Ya Chou ,  Kun-Ting Hung ,  Chia-Hao Yang ,  Nan-Cheng Chen

IPC: H01L25/065

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/85005 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/141 ,  H01L2924/142 ,  H01L2924/1421 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/83005 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/48247

Abstract: A semiconductor package is provided. The semiconductor package includes a carrier substrate having opposite first surface and second surface, and a chip stack disposed on the first surface of the carrier substrate. The chip stack includes a first semiconductor die, a second semiconductor die, and an interposer between the first semiconductor die and the second semiconductor die. The interposer transmits signals between the first semiconductor die and the second semiconductor die.

公开(公告)号：US09713093B2

公开(公告)日：2017-07-18

申请号：US15000023

申请日：2016-01-18

Applicant: MEDIATEK INC.

Inventor： Li-Chun Tu ,  Chia-Hao Yang ,  Tsung-Huang Chen

IPC: H04B1/00 ,  H04W52/02 ,  H04B1/40 ,  G06F3/06 ,  H04W88/06

CPC classification number: H04W52/0261 ,  G06F3/0625 ,  G06F3/0659 ,  G06F3/067 ,  H04B1/40 ,  H04W88/06 ,  Y02D70/00 ,  Y02D70/26 ,  Y02D70/40

Abstract: A wireless communication device including an integrated processing circuit, a first memory and a testing circuit is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit. The testing circuit is coupled to the first memory, and is capable of testing the first memory for determining if the first memory is an effective memory. The RF unit and the first memory are placed in a single module.

公开(公告)号：US09258030B2

公开(公告)日：2016-02-09

申请号：US14613374

申请日：2015-02-04

Applicant: MEDIATEK INC.

Inventor： Li-Chun Tu ,  Chia-Hao Yang ,  Tsung-Huang Chen

IPC: H04B1/00 ,  H04B1/40 ,  H04B1/3827 ,  H04B1/713 ,  H04L29/00

CPC classification number: H04B1/40 ,  G11C29/028 ,  G11C29/12 ,  H04B1/385 ,  H04B1/713 ,  H04L29/00

Abstract: A wireless communication device including an integrated processing circuit and a first memory is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one or more of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit, wherein the RF unit and the first memory are packaged in a single semiconductor device.

Abstract translation: 提供一种包括集成处理电路和第一存储器的无线通信装置。 集成处理电路包括能够处理无线通信信号的处理单元和能够执行射频（RF）信号和基带信号之间的转换的射频（RF）单元，其中无线通信信号是一个或多个 的RF信号和基带信号。 第一存储器耦合到集成处理电路。 第一存储器能够存储由处理单元使用的数据，其中RF单元和第一存储器封装在单个半导体器件中。

公开(公告)号：US10103128B2

公开(公告)日：2018-10-16

申请号：US15588690

申请日：2017-05-07

Applicant: MEDIATEK INC.

Inventor： Che-Ya Chou ,  Kun-Ting Hung ,  Chia-Hao Yang ,  Nan-Cheng Chen

IPC: H01L23/495 ,  H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/03 ,  H01L25/16 ,  H01L25/18 ,  H01L25/00 ,  H01L21/56

Abstract: A semiconductor package is provided. The semiconductor package includes a carrier substrate having opposite first surface and second surface, and a chip stack disposed on the first surface of the carrier substrate. The chip stack includes a first semiconductor die, a second semiconductor die, and an interposer between the first semiconductor die and the second semiconductor die. The interposer transmits signals between the first semiconductor die and the second semiconductor die.

公开(公告)号：US09801136B2

公开(公告)日：2017-10-24

申请号：US15344599

申请日：2016-11-07

Applicant: MEDIATEK INC.

Inventor： Li-Chun Tu ,  Chia-Hao Yang ,  Tsung-Huang Chen

IPC: H04B1/38 ,  H04W52/02 ,  H04B1/40 ,  G06F3/06 ,  H04W88/06

CPC classification number: H04W52/0261 ,  G06F3/0625 ,  G06F3/0659 ,  G06F3/067 ,  H04B1/40 ,  H04W88/06 ,  Y02D70/00 ,  Y02D70/26 ,  Y02D70/40

Abstract: A wireless communication device including an integrated processing circuit, a first memory and a testing circuit is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit. The testing circuit is coupled to the first memory, and is capable of testing the first memory for determining if the first memory is an effective memory. The RF unit is put in a first package, the first memory is put in a second package, and the first package and the second package are packaged in a single device.

公开(公告)号：US09564395B2

公开(公告)日：2017-02-07

申请号：US14809482

申请日：2015-07-27

Applicant: MediaTek Inc.

Inventor： Hsing-Chih Liu ,  Chia-Hao Yang ,  Ying-Chih Chen

IPC: H01L23/48 ,  H01L23/522 ,  H01L23/538 ,  H01L23/528 ,  H01L23/50 ,  H01L23/495 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L25/0655 ,  H01L23/49575 ,  H01L23/50 ,  H01L23/5221 ,  H01L23/528 ,  H01L23/5381 ,  H01L23/5386 ,  H01L24/05 ,  H01L24/06 ,  H01L24/09 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48138 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48479 ,  H01L2224/4903 ,  H01L2224/4909 ,  H01L2224/4911 ,  H01L2224/4912 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/4554

Abstract: A semiconductor package structure includes a base. A first die is mounted on the base. The first die comprises a plurality of first pads with a first pad area arranged in a first tier. A plurality of second pads with a second pad area is arranged in a second tier. A second die is mounted on the base. The second die includes a plurality of third pads arranged in a third tier. A first bonding wire has two terminals respectively coupled to one of the first pads and one of the third pads. A second bonding wire has two terminals respectively coupled to one of the third pads and one of the second pads.

Abstract translation: 半导体封装结构包括基底。 第一个模具安装在基座上。 第一管芯包括多个第一焊盘，第一焊盘区域布置在第一层中。 具有第二焊盘区域的多个第二焊盘被布置在第二层中。 第二个模具安装在基座上。 第二管芯包括布置在第三层中的多个第三焊盘。 第一接合线具有分别耦合到第一焊盘之一和第三焊盘中的一个的两个端子。 第二接合线具有分别耦合到第三焊盘之一和第二焊盘之一的两个端子。