USE OF VOLTAGE AND CURRENT MEASUREMENTS TO CONTROL DUAL ZONE CERAMIC PEDESTALS

    公开(公告)号:US20200255945A1

    公开(公告)日:2020-08-13

    申请号:US16859619

    申请日:2020-04-27

    摘要: A method for controlling temperature of a substrate support includes receiving first and second currents corresponding to first and second heater elements, respectively, of a substrate support, receiving first and second voltages corresponding to the first and second heater elements, respectively, calculating a first resistance of the first heater element based on the first voltage and the first current, calculating a second resistance of the second heater element based on the second voltage and the second current, calculating a first temperature of a first zone of the substrate support based on the first resistance and stored data correlating resistances to temperatures, calculating a second temperature of a second zone of the substrate support based on the second resistance and the stored data, and selectively adjusting the stored data based on a comparison between a sensed temperature and at least one of the calculated first temperature and second temperature.

    Wafer Edge Contact Hardware and Methods to Eliminate Deposition at Wafer Backside Edge and Notch

    公开(公告)号:US20180334746A1

    公开(公告)日:2018-11-22

    申请号:US15601876

    申请日:2017-05-22

    摘要: A pedestal assembly for a plasma processing system is provided. The assembly includes a pedestal with central top surface, e.g., mesa, and the central top surface extends from a center of the central top surface to an outer diameter of the central top surface. An annular surface surrounds the central top surface. The annular top surface is disposed at step down from the central top surface. A plurality of wafer supports project out of the central top surface at a support elevation distance above the central top surface. The plurality of wafer supports are evenly arranged around an inner radius of the center top surface. The inner radius is located between the center of the central top surface and less than a mid-radius that is approximately half way between the center of the pedestal and the outer diameter of the central top surface. A carrier ring configured for positioning over the annular surface of the pedestal is provided. The carrier ring has a carrier ring inner diameter, a carrier ring outer diameter, and a ledge surface that is annularly disposed around a top inner region of the carrier ring. The ledge surface is recessed below a top outer region of the carrier ring. A plurality of carrier ring supports are disposed outside of the annular surface of the pedestal. The carrier ring supports define a carrier ring elevation dimension of the carrier ring, above the central top surface of the pedestal, when the carrier ring rests upon the plurality of carrier ring supports. The carrier ring elevation dimension is configured to be higher than the central top surface of the pedestal than the support elevation distance.

    LOW VOLUME SHOWERHEAD WITH POROUS BAFFLE
    10.
    发明申请
    LOW VOLUME SHOWERHEAD WITH POROUS BAFFLE 审中-公开
    低容量的沙发与多孔的BAFFLE

    公开(公告)号:US20150315706A1

    公开(公告)日:2015-11-05

    申请号:US14668511

    申请日:2015-03-25

    摘要: A low volume showerhead in a semiconductor processing apparatus can include a porous baffle to improve the flow uniformity and purge time during atomic layer deposition. The showerhead can include a plenum volume, one or more gas inlets in fluid communication with the plenum volume, a faceplate including a plurality of first through-holes for distributing gas onto a substrate in the semiconductor processing apparatus, and a porous baffle positioned in a region between the plenum volume and the one or more gas inlets. The one or more gas inlets can include a stem having a small volume to improve purge time. The baffle can be porous and positioned between the stem and the plenum volume to improve flow uniformity and avoid jetting.

    摘要翻译: 半导体处理装置中的低容量喷头可以包括多孔挡板,以改善原子层沉积期间的流动均匀性和吹扫时间。 淋浴头可以包括增压室容积,一个或多个与增压室容积流体连通的气体入口,一个面板,包括多个第一通孔,用于将气体分配到半导体处理装置中的基板上,多孔挡板位于 增压室与一个或多个气体入口之间的区域。 一个或多个气体入口可以包括具有小体积的杆以改善吹扫时间。 挡板可以是多孔的并且位于阀杆和增压室之间以提高流动均匀性并避免喷射。