Abstract:
A DRAM includes a package, a semiconductor chip housed in the package, and a plurality of leads each disposed from the outside of the package over the periphery of the semiconductor chip. The power supply potential is applied to some of the leads. Corresponding to one power supply lead, one power supply pad and one selection pad are formed. Corresponding to another power supply lead, another power supply pad and another selection pad are formed. Each of these two selection pads is connected or not connected to the corresponding power supply lead by bonding. As a result, one of four word configurations is selected. Since these two selection pads are disposed in the vicinity of the corresponding power supply leads, respectively, the number of times of bonding to one power supply lead is reduced.
Abstract:
A .phi..sub.C generation circuit provides a column address buffer control signal to a column address buffer so that the column address buffer maintains a latch operation during the operation period of a differential amplifier. The column address buffer responds to a column address buffer control signal to latch an input address signal for providing a column address signal to a .phi..sub.D and PAE generation circuit. The .phi..sub.D and PAE generation circuit provides a differential amplifier activation signal to the differential amplifier according to a column address signal and a column access activation signal. The differential amplifier responds to a differential amplifier activation signal for amplifying data applied from a data input and output line to provide the same to a selector via a readout data line.
Abstract:
In a memory cell array, data lines are formed into a hierarchical arrangement of sub data lines provided for every block and a main data line common to each block, and a sub data line selected by a column address among sub data lines belonging a block which are simultaneously selected by a row address is connected to a bit line. Accordingly, the sub data line length is reduced, which reduces floating capacitance, reading and writing operations can be conducted at a high speed, and sub data lines can be selectively operated. In addition, power required for charging the sub data lines can be reduced, and entire power consumption by the semiconductor memory device can be reduced as well.
Abstract:
A .phi..sub.C generation circuit provides a column address buffer control signal to a column address buffer so that the column address buffer maintains a latch operation during the operation period of a differential amplifier. The column address buffer responds to a column address buffer control signal to latch an input address signal for providing a column address signal to a .phi..sub.D and PAE generation circuit. The .phi..sub.D and PAE generation circuit provides a differential amplifier activation signal to the differential amplifier according to a column address signal and a column access activation signal. The differential amplifier responds to a differential amplifier activation signal for amplifying data applied from a data input and output line to provide the same to a selector via a readout data line.
Abstract:
A .phi..sub.C generation circuit provides a column address buffer control signal to a column address buffer so that the column address buffer maintains a latch operation during the operation period of a differential amplifier. The column address buffer responds to a column address buffer control signal to latch an input address signal for providing a column address signal to a .phi..sub.D and PAE generation circuit. The .phi..sub.D and PAE generation circuit provides a differential amplifier activation signal to the differential amplifier according to a column address signal and a column access activation signal. The differential amplifier responds to a differential amplifier activation signal for amplifying data applied from a data input and output line to provide the same to a selector via a readout data line.
Abstract:
Read data supplied from one of a plurality of differential amplifier circuits is transmitted to a read data bus driver circuit via one of a plurality of CMOS transfer gates and a data latch circuit. The potential of read data bus pair is forcedly set to a low level in response to a control signal until the read data is transmitted to the read data bus driver circuit. Thereafter, the read data bus driver circuit drives the read data bus pair in accordance with the transmitted read data. Thereby, a speed of the address access operation can be increased without outputting invalid data.
Abstract:
An electronic control unit (ECU) of an internal combustion engine, which includes an air-fuel ratio sensor arranged at a downstream side of an exhaust purification catalyst, is configured to judge if a state of the air-fuel ratio sensor is normal or abnormal based on the first characteristic of change of air-fuel ratio and, if a judgment cannot be made based on the first characteristic, the ECU is configured to judge if the state of the air-fuel ratio sensor is normal or abnormal based on a second characteristic of change of air-fuel ratio. As a result, it is possible to suppress the effects of the change of state of the exhaust purification catalyst while accurately diagnosing the abnormality of deterioration of response of a downstream side air-fuel ratio sensor.
Abstract:
An internal combustion engine comprises an exhaust purification catalyst arranged in an exhaust passage of the internal combustion engine and being able to store oxygen in inflowing exhaust gas and an air-fuel ratio sensor arranged at a downstream side of the exhaust purification catalyst in a direction of exhaust flow and detecting an air-fuel ratio of exhaust gas flowing out from the exhaust purification catalyst and stops or decreases a feed of fuel to a combustion chamber as fuel cut control. The abnormality diagnosis system calculates a characteristic of change of an air-fuel ratio based on an output air-fuel ratio output from the air-fuel ratio sensor at the time when the output air-fuel ratio first passes a part of an air-fuel ratio region of a stoichiometric air-fuel ratio or more after an end of the fuel cut control, and diagnoses abnormality of the air-fuel ratio sensor based on the characteristic of change of the air-fuel ratio. As a result, the diagnosis system can diagnose the abnormality of deterioration of response of the downstream side air-fuel ratio sensor when necessary without fail when performing fuel cut control.
Abstract:
The invention provides a way of producing a natural immunologically active state in a person by subjecting him to an apheresis procedure with bioincompatible biomaterials for about one hour. To safely control the immunological shock induced by this procedure, the person is put under general anesthesia for about six hours, including the apheresis time and at least an additional five hours thereafter. This immunological activation is useful for treating malignant tumors and diseases related to immunosuppression, such as AIDS. The invention also provides for the use of an apheresis column containing a blood perfusion filter with bioincompatible materials for treating malignant tumors and infectious diseases.
Abstract:
A fuel injection amount control system acquires a pre-correction air-fuel ratio imbalance index value that increases as the degree of ununiformity in the air-fuel ratio among cylinders increases, based on an output value of an upstream air-fuel ratio sensor, and obtains a value (intake air amount correlation value) corresponding to the intake air amount and a value (engine speed correlation value) corresponding to the engine speed over a period in which the pre-correction air-fuel ratio imbalance index value is acquired. Also, a post-correction air-fuel ratio imbalance index value is acquired by correcting the pre-correction air-fuel ratio imbalance index value based on the intake air amount correlation value and the engine speed correlation value, and the air-fuel ratio of the engine is controlled based on the post-correction air-fuel ratio imbalance index value.