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公开(公告)号：US09324653B2
公开(公告)日：2016-04-26
申请号：US14085418
申请日：2013-11-20
发明人： Shigehiro Asano , Shinichi Kanno , Junji Yano
IPC分类号： G11C11/34 , H01L23/522 , G11C5/00 , G11C5/04 , G11C5/06 , H01L23/60 , H01L25/065 , G06F9/44 , G11C16/04 , H01L23/00
CPC分类号： H01L23/5228 , G06F9/4401 , G11C5/005 , G11C5/04 , G11C5/066 , G11C16/0408 , H01L23/60 , H01L24/48 , H01L25/0657 , H01L2224/05554 , H01L2224/48091 , H01L2224/48145 , H01L2224/48147 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/01046 , H01L2924/01055 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/19041 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： On a single semiconductor package PK1, m semiconductor chips CP1 to CPm are mounted, and the semiconductor package PK1 has external terminals T shared by m pad electrodes PD1 to PDm of the m semiconductor chips CP1 to CPm. An electrostatic protection circuit CD is mounted on only one CPm of the m semiconductor chips CP1 to CPm.
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公开(公告)号：US20140351497A1
公开(公告)日：2014-11-27
申请号：US14455680
申请日：2014-08-08
发明人： Kazuya KITSUNAI , Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Junji Yano
IPC分类号： G06F12/02
CPC分类号： G06F3/0604 , G06F3/0616 , G06F3/0619 , G06F3/064 , G06F3/0647 , G06F3/0652 , G06F3/0659 , G06F3/0679 , G06F3/0685 , G06F12/0246 , G06F2212/1036 , G06F2212/7202 , G06F2212/7205 , G06F2212/7211
摘要： A memory system includes a nonvolatile memory including a plurality of blocks as data erase units, a measuring unit which measures an erase time at which data of each block is erased, and a block controller which writes data supplied from at least an exterior into a first block which is set in a free state and whose erase time is oldest.
摘要翻译： 存储器系统包括包括作为数据擦除单元的多个块的非易失性存储器，测量擦除每个块的数据的擦除时间的测量单元，以及写入从至少外部提供的数据到第一 块设置为空闲状态，擦除时间最长。
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公开(公告)号：US08677059B2
公开(公告)日：2014-03-18
申请号：US13782006
申请日：2013-03-01
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda
IPC分类号： G06F13/10
CPC分类号： G06F12/0246 , G06F2212/7203 , G06F2212/7205 , G06F2212/7207
摘要： According to one embodiment, a memory system includes a nonvolatile semiconductor memory include a first area, and a second area smaller than the first area; and a controller configured to control data stored in the nonvolatile semiconductor memory, wherein the nonvolatile semiconductor memory is configured to store a first data accessible by a host command and to a second data inaccessible by the host command, and when receiving the host command, the controller writes the second data of the first area within the second area and initializes a first address information related the first data.
摘要翻译： 根据一个实施例，存储器系统包括非易失性半导体存储器，包括第一区域和小于第一区域的第二区域; 以及控制器，被配置为控制存储在所述非易失性半导体存储器中的数据，其中所述非易失性半导体存储器被配置为存储可由主机命令访问的第一数据和所述主机命令不可访问的第二数据，并且当接收到所述主机命令时， 控制器将第一区域的第二数据写入第二区域内，并初始化与第一数据相关的第一地址信息。
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公开(公告)号：US09176816B2
公开(公告)日：2015-11-03
申请号：US14262405
申请日：2014-04-25
CPC分类号： G06F11/1068 , G06F3/0619 , G06F3/0679 , G06F11/1072 , G11C16/06 , G11C29/52 , G11C29/78 , G11C2029/0411
摘要： A memory system includes a controlling unit that configured to control data transfer between the first and the second memory. The controlling unit executes copy processing for, after reading out data stored in a first page of the second memory to the first memory, writing the data in a second page of the second memory, determines, when executing the copy processing, whether the error correction processing for the data read out from the first page is successful, stores, when the error correction processing is successful, corrected data in the first memory and writes the corrected data in the second page, and reads out, when the error correction processing is unsuccessful, the data from the first page to the first memory and writes the data not subjected to the error correction processing in the second page.
摘要翻译： 存储器系统包括控制单元，其被配置为控制第一和第二存储器之间的数据传输。 控制单元执行复制处理，在将第二存储器的第一页中存储的数据读出到第一存储器之后，将数据写入第二存储器的第二页，在执行复制处理时确定纠错 从第一页读出的数据的处理成功，当纠错处理成功时存储第一存储器中的校正数据并将修正数据写入第二页，并且当纠错处理失败时读出 ，从第一页到第一存储器的数据，并将未经过纠错处理的数据写入第二页。
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5.发明授权公开(公告)号：US09164896B2
公开(公告)日：2015-10-20
申请号：US14475317
申请日：2014-09-02
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda
CPC分类号： G06F3/0619 , G06F3/0647 , G06F3/065 , G06F3/0652 , G06F3/0685 , G06F11/1456 , G06F11/1469 , G06F11/1471 , G06F12/0246 , G06F2201/84 , G06F2212/7201 , G06F2212/7207 , G11C7/20 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/105
摘要： A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.
摘要翻译： 存储器系统包括管理信息恢复单元。 管理信息恢复单元根据NAND存储器中的预登录或后登录来确定是否发生了短暂中断。 管理信息恢复单元确定在NAND存储器中存在预登录或后记录时发生短暂中断。 在这种情况下，管理信息恢复单元确定短暂发生的发生时间，并且在选择用于恢复的预登录或后记录之后，在快照上执行反映这些日志的管理信息的恢复。 此后，管理信息恢复单元对NAND存储器中的所有一次写入块应用恢复处理，再次拍摄快照，并打开过去的快照和日志。
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6.发明授权Memory system and method for controlling a nonvolatile semiconductor memory 有权用于控制非易失性半导体存储器的存储系统和方法公开(公告)号：US09092324B2
公开(公告)日：2015-07-28
申请号：US14253991
申请日：2014-04-16
发明人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Wataru Okamoto
CPC分类号： G06F3/061 , G06F3/065 , G06F3/0661 , G06F3/0679 , G06F12/0246 , G06F2206/1014 , G06F2212/7203 , G06F2212/7205 , G11C11/5628 , G11C16/0483 , G11C16/102 , G11C2211/5643 , G11C2211/5646
摘要： A memory system includes a nonvolatile semiconductor memory having blocks, the block being data erasing unit; and a controller configured to execute; an update processing for; writing superseding data in a block, the superseding data being treated as valid data; and invalidating superseded data having the same logical address as the superseding data, the superseded data being treated as invalid data; and a compaction processing for; retrieving blocks having invalid data using a management table, the management table managing blocks in a linked list format for each number of valid data included in the block; selecting a compaction source block having at least one valid data from the retrieved blocks; copying a plurality of valid data included in the compaction source blocks into a compaction target block; invalidating the plurality of valid data in the compaction source blocks; and releasing the compaction source blocks in which all data are invalidated.
摘要翻译： 存储器系统包括具有块的非易失性半导体存储器，该块是数据擦除单元; 以及控制器，被配置为执行; 更新处理; 在块中写入替代数据，替代数据被视为有效数据; 并且使具有与取代数据相同的逻辑地址的替代数据无效，所取代的数据被视为无效数据; 和压实处理; 使用管理表检索具有无效数据的块，所述管理表管理所述块中包括的每个数量的有效数据的链接列表格式的块; 从所检索的块中选择具有至少一个有效数据的压缩源块; 将压缩源块中包括的多个有效数据复制到压缩目标块中; 使压缩源块中的多个有效数据无效; 并释放其中所有数据无效的压缩源块。
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公开(公告)号：US09037947B2
公开(公告)日：2015-05-19
申请号：US14309611
申请日：2014-06-19
发明人： Toshikatsu Hida , Shinichi Kanno , Hirokuni Yano , Kazuya Kitsunai , Shigehiro Asano , Junji Yano
CPC分类号： G06F11/1412 , G06F11/1068 , G06F11/1402 , G06F12/02 , G11C16/0483 , G11C16/3418 , G11C16/3431
摘要： A method of controlling a nonvolatile semiconductor memory includes checking a first group at a first interval period, the first group including a plurality of blocks, and when a first block in the first group satisfies a first condition, assigning the first block to a second group. The method includes checking, at a second interval period, an error count of data stored in the second group, and when a second block in the second group satisfies a second condition, moving data stored in the second block to an erased block in which stored data is erased among the plurality of blocks.
摘要翻译： 一种控制非易失性半导体存储器的方法包括以第一间隔周期检查第一组，第一组包括多个块，并且当第一组中的第一块满足第一条件时，将第一块分配给第二组 。 该方法包括在第二间隔期间检查存储在第二组中的数据的错误计数，并且当第二组中的第二块满足第二条件时，将存储在第二块中的移动数据移动到已存储的擦除块 在多个块中擦除数据。
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公开(公告)号：US08930615B2
公开(公告)日：2015-01-06
申请号：US13850062
申请日：2013-03-25
发明人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki
CPC分类号： G06F12/0246 , G06F12/0804 , G06F12/0866 , G06F2212/7201
摘要： A controller includes an identification information management table that manages identification information indicating, for each of addresses in second-management unit, whether one or more data in first management unit belonging to the addresses is stored in the second or the third storing area. When the controller executes a process of flushing data from the first storing area to the second storing area or the third storing area, the controller updates the identification information in the identification information management table. The controller executes a process of reading data from the second storing area or the third storing area by referring to the identification information. As a result, the speed of searches conducted in the management table is increased.
摘要翻译： 控制器包括：识别信息管理表，其管理对于第二管理单元中的每个地址，指示属于所述地址的第一管理单元中的一个或多个数据是否存储在所述第二或第三存储区域中的标识信息。 当控制器执行将数据从第一存储区域刷新到第二存储区域或第三存储区域的处理时，控制器更新识别信息管理表中的识别信息。 控制器通过参照识别信息执行从第二存储区域或第三存储区域读取数据的处理。 结果，增加了在管理表中进行的搜索速度。
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9.发明授权公开(公告)号：US08850107B2
公开(公告)日：2014-09-30
申请号：US13859528
申请日：2013-04-09
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda
CPC分类号： G06F3/0619 , G06F3/0647 , G06F3/065 , G06F3/0652 , G06F3/0685 , G06F11/1456 , G06F11/1469 , G06F11/1471 , G06F12/0246 , G06F2201/84 , G06F2212/7201 , G06F2212/7207 , G11C7/20 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/105
摘要： A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.
摘要翻译： 存储器系统包括管理信息恢复单元。 管理信息恢复单元根据NAND存储器中的预登录或后登录来确定是否发生了短暂中断。 管理信息恢复单元确定在NAND存储器中存在预登录或后记录时发生短暂中断。 在这种情况下，管理信息恢复单元确定短暂发生的发生时间，并且在选择用于恢复的预登录或后记录之后，在快照上执行反映这些日志的管理信息的恢复。 此后，管理信息恢复单元对NAND存储器中的所有一次写入块应用恢复处理，再次拍摄快照，并打开过去的快照和日志。
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公开(公告)号：US20140237320A1
公开(公告)日：2014-08-21
申请号：US14262405
申请日：2014-04-25
CPC分类号： G06F11/1068 , G06F3/0619 , G06F3/0679 , G06F11/1072 , G11C16/06 , G11C29/52 , G11C29/78 , G11C2029/0411
摘要： A memory system includes a controlling unit that configured to control data transfer between the first and the second memory. The controlling unit executes copy processing for, after reading out data stored in a first page of the second memory to the first memory, writing the data in a second page of the second memory, determines, when executing the copy processing, whether the error correction processing for the data read out from the first page is successful, stores, when the error correction processing is successful, corrected data in the first memory and writes the corrected data in the second page, and reads out, when the error correction processing is unsuccessful, the data from the first page to the first memory and writes the data not subjected to the error correction processing in the second page.
摘要翻译： 存储器系统包括控制单元，其被配置为控制第一和第二存储器之间的数据传输。 控制单元执行复制处理，在将第二存储器的第一页中存储的数据读出到第一存储器之后，将数据写入第二存储器的第二页，在执行复制处理时确定纠错 从第一页读出的数据的处理成功，当纠错处理成功时存储第一存储器中的校正数据并将修正数据写入第二页，并且当纠错处理失败时读出 ，从第一页到第一存储器的数据，并将未经过纠错处理的数据写入第二页。
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