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公开(公告)号：US20170154682A1
公开(公告)日：2017-06-01
申请号：US15099369
申请日：2016-04-14
Inventor： Jaekyun MOON , Jaehyeong NO
IPC: G11C16/26
CPC classification number: G11C16/26 , G11C7/02 , G11C16/0483 , G11C16/08 , G11C29/42 , G11C29/4401
Abstract: A memory system includes: a memory apparatus suitable for providing read data; and a plurality of equalizing units respectively suitable for rotationally performing equalization operations to the read data in different directions in a two-dimensional inter-symbol interference (2D ISI) mask, wherein the 2D ISI mask comprises the read data of a victim cell and a plurality of interference data, which exert interferential influence on the read data, of interference cells neighboring the victim cell, and wherein a first one of the equalizing units generates a first equalization information by performing the equalization operation to the read data in a first one of the different directions based on a third equalization information received from a third one of the equalizing units, and provides the generated first equalization information to a second one of the equalizing units.
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公开(公告)号：US20180067880A1
公开(公告)日：2018-03-08
申请号：US15601039
申请日：2017-05-22
Inventor： Jaekyun MOON , Soon-Young KANG , Sung-Whan YOON
IPC: G06F13/16 , G06F12/02 , G11C11/4091 , G11C7/10
CPC classification number: G06F13/1694 , G06F12/0246 , G06F12/0607 , G06F2212/1032 , G06F2212/7202 , G11C7/1006 , G11C7/1042 , G11C11/4091 , G11C11/5642 , G11C16/0483 , G11C16/26
Abstract: A controller may include a first encoder suitable for generating a first polar parity by performing a first polar encoding operation to respective first sections of an original message having a plurality of symbols, an interleaver suitable for generating an interleaved message by interleaving the original message according to first reliabilities, which are predetermined depending on locations of the respective symbols in the respective first sections in the original message, and second reliabilities, which are predetermined depending on locations of the respective symbols in the interleaved message, a second encoder suitable for generating a second polar parity by performing a second polar encoding operation to respective second sections included in the interleaved message and a memory interface suitable for storing the original message, the first polar parity and the second polar parity into a memory.
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公开(公告)号：US20220261576A1
公开(公告)日：2022-08-18
申请号：US17454029
申请日：2021-11-08
Inventor： Jun SEO , Younghyun PARK , Jaekyun MOON
Abstract: An object detecting device includes a feature extracting circuit configured to extract first feature data from an input image; a feature transforming circuit configured to transform the first feature data into transformed feature data according to a transformation function; and a decoder circuit configured to decode the transformed feature data into a region map indicating a detected object.
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公开(公告)号：US20200257970A1
公开(公告)日：2020-08-13
申请号：US16431319
申请日：2019-06-04
Inventor： Jaekyun MOON , Sung Whan YOON , Jun SEO
Abstract: A data processing method by learning of a neural network may be provided. The data processing method by the learning of a neural network includes: obtaining a first set of output values by processing a first set of input values of a task by the neural network; forming a projection space on the basis of the first set of output values; obtaining a second set of output values by processing a second set of input values out of input values of the task by the neural network; projecting the second set of output values onto the projection space; and performing processing the second set of output values in the projection space.
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公开(公告)号：US20180062668A1
公开(公告)日：2018-03-01
申请号：US15666705
申请日：2017-08-02
Inventor： Jaekyun MOON , Beongjun CHOI , Sung Whan YOON
CPC classification number: H03M13/2906 , G06F11/1012 , G06F11/1068 , G11C29/021 , G11C29/028 , G11C29/50004 , G11C29/52 , G11C2029/0409 , H03M13/09 , H03M13/3707
Abstract: An operation method of a controller includes: generating a predetermined number of sub-messages by dividing an original message; generating a first parity added message by adding a cyclic redundancy check (CRC) parity message of a predetermined length to each of the sub-messages; and generating an encoded message by performing a polar encoding operation to the first parity added message.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20140010031A1
公开(公告)日：2014-01-09
申请号：US13767598
申请日：2013-02-14
Inventor： Seok Hwan CHOI , Joong Seob YANG , Seung Ho CHANG , Sang Sik KIM , Sang Chul LEE , Ho Yeon LEE , Jaekyun MOON , Jaehyeong NO
IPC: G11C29/04
CPC classification number: G11C29/04 , G11C11/16 , G11C11/22 , G11C13/00 , G11C16/00 , G11C29/50004 , G11C2029/5002
Abstract: A method for estimating channel characteristics of a nonvolatile memory device including a plurality of memory cells includes the steps of: calculating first threshold voltage distributions of the memory cells programmed according to input data, based on the input data and a physical structure of the memory cells; calculating second threshold voltage distributions of the memory cells, based on output data and the physical structure of the memory cells; and analyzing the relation between the first and second threshold voltage distributions, using a mask.
Abstract translation: 一种用于估计包括多个存储单元的非易失性存储器件的通道特性的方法，包括以下步骤：基于输入数据和存储单元的物理结构，计算根据输入数据编程的存储器单元的第一阈值电压分布 ; 基于输出数据和存储器单元的物理结构计算存储器单元的第二阈值电压分布; 以及使用掩模分析第一和第二阈值电压分布之间的关系。
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7.发明公开公开(公告)号：US20230298677A1
公开(公告)日：2023-09-21
申请号：US17847056
申请日：2022-06-22
Inventor： Sunyoung JO , Jungwuk PARK , Younghyun PARK , Sang Ho YUN , Jaekyun MOON
CPC classification number: G11C16/3431 , G06N3/0454 , G11C16/28
Abstract: A device includes a threshold voltage distribution estimation network configured to generate an estimated distribution using a feature distribution and read trial information, a set of feature distributions generated from a plurality of threshold voltage distributions for a plurality of pages of a memory device, and a read reference voltage estimation network configured to generate a read reference voltage from the estimated distribution. The read trial information includes a read trial vector and an output value, the output value being generated by applying the read trial vector to a threshold voltage distribution for a page to be read among the plurality of threshold voltage distributions.
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公开(公告)号：US20220262006A1
公开(公告)日：2022-08-18
申请号：US17456313
申请日：2021-11-23
Inventor： Younghyun PARK , Jun SEO , Jaekyun MOON
Abstract: An edge detecting device includes a feature extracting circuit configured to extract first and second feature data from an input image; a prototype generating circuit configured to generate prototype data using the first feature data and an input label, the prototype data including foreground and background information of an object; a region detecting circuit configured to generate a segmentation mask by detecting a region of an object using the first feature data and the prototype data; and an edge extracting circuit configured to generate an edge map by combining the segmentation mask and the second feature data.
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公开(公告)号：US20200327947A1
公开(公告)日：2020-10-15
申请号：US16848578
申请日：2020-04-14
Inventor： Suk Kwang PARK , Jaekyun MOON , Minsu CHOI
Abstract: A memory system includes a memory device including a plurality of memory cells, and a controller configured to access the plurality of memory cells. The controller includes a data read block configured to read first data from one or more pages included in first memory cells, determine a target memory cell subject to a compensation based on the first data, and read second data from one or more pages of second memory cells adjacent to the target memory cell, and an equalizer configured to convert the second data into symbol interfering data, check a probability of the first data from a lookup table according to the symbol interfering data, and determine the compensation on the first data based on the probability.
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公开(公告)号：US20150155888A1
公开(公告)日：2015-06-04
申请号：US14555656
申请日：2014-11-27
Inventor： Jaekyun MOON , Geunyeong YU
CPC classification number: H03M13/2912 , G06F11/1012 , H03M13/1102 , H03M13/1515 , H03M13/152 , H03M13/19 , H03M13/293 , H03M13/3761
Abstract: A concatenated error correction device may be provided that includes: a first encoder which encodes a plurality of blocks arranged in a column direction and a row direction into a block-wise product code consisting of column codes and row codes by applying a first error correction code to the blocks in each of the column direction and the row direction; and a second encoder which receives K number of source symbols and applies a second error correction code to the source symbols, and then encodes into N number of symbols including N-K number of parity symbols. The N number of symbols form the plurality of blocks. K and N are natural numbers.
Abstract translation: 可以提供一种级联纠错装置，其包括：第一编码器，通过应用第一纠错码将由列方向和行方向排列的多个块编码成由列码和行码组成的块式产品代码 到列方向和行方向中的每一个的块; 以及第二编码器，其接收K个源符号，并向源符号应用第二纠错码，然后将其编码为包括N-K个奇偶校验符号的N个符号。 N个符号形成多个块。 K和N是自然数。
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