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公开(公告)号:US20160163818A1
公开(公告)日:2016-06-09
申请号:US15001726
申请日:2016-01-20
申请人: KAZUMI CHIDA , DENSO CORPORATION
IPC分类号: H01L29/66 , H01L21/3065 , H01L21/04 , H01L21/02 , H01L29/16 , H01L29/423
CPC分类号: H01L29/66068 , H01L21/02529 , H01L21/0455 , H01L21/0475 , H01L21/049 , H01L21/3065 , H01L29/045 , H01L29/0619 , H01L29/0623 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/4236 , H01L29/66348 , H01L29/66734 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/7827
摘要: In a method for producing an SiC semiconductor device, a p type layer is formed in a trench by epitaxially growing, and is then left only on a bottom portion and ends of the trench by hydrogen etching, thereby to form a p type SiC layer. Thus, the p type SiC layer can be formed without depending on diagonal ion implantation. Since it is not necessary to separately perform the diagonal ion implantation, it is less likely that a production process will be complicated due to transferring into an ion implantation apparatus, and thus manufacturing costs reduce. Since there is no damage due to a defect caused by the ion implantation, it is possible to reduce a drain leakage and to reliably restrict the p type SiC layer from remaining on the side surface of the trench.
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公开(公告)号:US20210005744A1
公开(公告)日:2021-01-07
申请号:US17025213
申请日:2020-09-18
申请人: DENSO CORPORATION
摘要: A semiconductor device includes: an inversion type semiconductor element that includes: a substrate having a first conductivity type or a second conductivity type; a first conductivity type layer formed on the substrate; a second conductivity type region that is formed on the first conductivity type layer; a JFET portion that is formed on the first conductivity type layer, is sandwiched by the second conductivity type region to be placed; a source region that is formed on the second conductivity region; a gate insulation film formed on a channel region that is a part of the second conductivity type region; a gate electrode formed on the gate insulation film; an interlayer insulation film covering the gate electrode and the gate insulation film, and including a contact hole; a source electrode electrically connected to the source region through the contact hole; and a drain electrode formed on a back side of the substrate.
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公开(公告)号:US20190386095A1
公开(公告)日:2019-12-19
申请号:US16304866
申请日:2017-06-29
摘要: Intervals of the frame portion and the p type guard ring on a cell portion side are made narrower than other parts, and the narrowed part provides a dot line portion. By narrowing the intervals of the frame portion and the p type guard ring on the cell portion side, the electric field concentration is reduced on the cell portion side, and the equipotential line directs to more outer circumferential side. By providing the dot line portions, the difference in the formation areas of the trench per unit area in the cell portion, the connection portion and the guard ring portion is reduced, and the thicknesses of the p type layers formed on the cell portion, the connection portion and the guard ring portion are uniformed. Thereby, when etching-back the p type layer, the p type layer is prevented from remaining as a residue in the guard ring portion.
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公开(公告)号:US20190035882A1
公开(公告)日:2019-01-31
申请号:US16069914
申请日:2017-01-19
申请人: DENSO CORPORATION
摘要: A method for manufacturing a compound semiconductor device includes: providing a semiconductor substrate including a foundation layer having a first conductivity type; forming a deep trench in the foundation layer; and forming a deep layer having a second conductivity type by introducing material gas of the compound semiconductor while introducing dopant gas into an epitaxial growth equipment to cause epitaxial growth of the deep layer in the deep trench. A period in which a temperature in the epitaxial growth equipment is increased to a temperature of the epitaxial growth of the deep layer is defined as a temperature increasing period. In the forming the deep layer, the deep layer is further formed in a bottom corner portion of the deep trench by starting the introducing of the dopant gas during the temperature increasing period and starting the introducing of the material gas after the temperature increasing period.
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公开(公告)号:US20220005928A1
公开(公告)日:2022-01-06
申请号:US17477168
申请日:2021-09-16
发明人: Yuichi TAKEUCHI , Ryota SUZUKI , Tatsuji NAGAOKA , Sachiko AOI
摘要: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.
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公开(公告)号:US20200381313A1
公开(公告)日:2020-12-03
申请号:US16997210
申请日:2020-08-19
发明人: Akira AMANO , Takayuki SATOMURA , Yuichi TAKEUCHI , Katsumi SUZUKI , Sachiko AOI
摘要: When a film thickness of a second epitaxial film is measured, an infrared light is irradiated from a surface side of the second epitaxial film onto a base layer on which a first epitaxial film and the second epitaxial film are formed. A reflected light from an interface between the first epitaxial film and the base layer and a reflected light from a surface of the second epitaxial film are measured to obtain a two-layer film thickness, which is a total film thickness of the first epitaxial film and the second epitaxial film. The film thickness of the second epitaxial film is calculated by subtracting a one-layer film thickness, which is a film thickness of the first epitaxial film, from the two-layer film thickness.
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公开(公告)号:US20190288107A1
公开(公告)日:2019-09-19
申请号:US16421849
申请日:2019-05-24
摘要: A silicon carbide semiconductor device includes: a substrate; a drift layer over the substrate; a base region over the drift layer; multiple source regions over an upper layer portion of the base region; a contact region over the upper layer portion of the base region between opposing source regions; multiple trenches from a surface of each source region to a depth deeper than the base region; a gate electrode on a gate insulating film in each trench; a source electrode electrically connected to the source regions and the contact region; a drain electrode over a rear surface of the substrate; and multiple electric field relaxation layers in the drift layer between adjacent trenches. Each electric field relaxation layer includes: a first region at a position deeper than the trenches; and a second region from a surface of the drift layer to the first region.
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公开(公告)号:US20190288074A1
公开(公告)日:2019-09-19
申请号:US16427413
申请日:2019-05-31
发明人: Yuichi TAKEUCHI , Ryota SUZUKI , Tatsuji NAGAOKA , Sachiko AOI
摘要: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.
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公开(公告)号:US20190214264A1
公开(公告)日:2019-07-11
申请号:US16353670
申请日:2019-03-14
IPC分类号: H01L21/3065 , H01L29/10 , H01L29/66 , H01L29/872 , H01L29/78 , H01L29/16 , H01L23/544 , H01L21/02 , H01L21/311
摘要: In a manufacturing method of a silicon carbide semiconductor device, a semiconductor substrate made of silicon carbide and on which a base layer is formed is prepared, a trench is provided in the base layer, a silicon carbide layer is epitaxially formed on a surface of the base layer while filling the trench with the silicon carbide layer, the sacrificial layer is planarized by reflow after forming the sacrificial layer, and the silicon carbide layer is etched back together with the planarized sacrificial layer by dry etching under an etching condition in which an etching selectivity of the silicon carbide layer to the sacrificial layer is 1.
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公开(公告)号:US20170263757A1
公开(公告)日:2017-09-14
申请号:US15505267
申请日:2015-09-08
CPC分类号: H01L29/7813 , H01L21/046 , H01L21/047 , H01L29/0688 , H01L29/0878 , H01L29/0886 , H01L29/1095 , H01L29/1608 , H01L29/66068
摘要: A silicon carbide semiconductor device includes: a substrate; a drift layer over the substrate; a base region over the drift layer; multiple source regions over an upper layer portion of the base region; a contact region over the upper layer portion of the base region between opposing source regions; multiple trenches from a surface of each source region to a depth deeper than the base region; a gate electrode on a gate insulating film in each trench; a source electrode electrically connected to the source regions and the contact region; a drain electrode over a rear surface of the substrate; and multiple electric field relaxation layers in the drift layer between adjacent trenches. Each electric field relaxation layer includes: a first region at a position deeper than the trenches; and a second region from a surface of the drift layer to the first region.
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