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    Method of manufacturing a plurality of electronic assemblies
    2.
    发明授权
    Method of manufacturing a plurality of electronic assemblies 有权
    制造多个电子组件的方法

    公开(公告)号：US08709869B2

    公开(公告)日：2014-04-29

    申请号：US13620477

    申请日：2012-09-14

    申请人： John J. Beatty ,  Jason A. Garcia

    发明人： John J. Beatty ,  Jason A. Garcia

    IPC分类号： H01L21/00

    CPC分类号： H01L25/50 ,  H01L21/563 ,  H01L23/3114 ,  H01L25/0657 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2924/19041

    摘要： A method of manufacturing a plurality of electronic devices is provided. Each one of a plurality of first conductive terminals on a plurality of integrated circuits formed on a device wafer is connected to a respective one of a plurality of second conductive terminals on a carrier wafer, thereby forming a combination wafer assembly. The combination wafer assembly is singulated between the integrated circuits to form separate electronic assemblies. The combination wafer assembly also allows for an underfill material to be introduced and to cured at wafer level and for thinning of the device wafer at wafer level without requiring a separate supporting substrate. Alignment between the device wafer and the carrier wafer can be tested by conducting a current through first and second conductors in the device and carrier wafers, respectively.

    摘要翻译： 提供一种制造多个电子设备的方法。 形成在器件晶片上的多个集成电路上的多个第一导电端子中的每一个连接到载体晶片上的多个第二导电端子中的相应一个，从而形成组合晶片组件。 组合晶片组件在集成电路之间分离以形成分离的电子组件。 组合晶片组件还允许底片填充材料被引入并在晶片级别固化并且在晶片级别使器件晶片变薄，而不需要单独的支撑衬底。 可以通过分别通过在器件和载体晶片中的电流通过第一和第二导体来测试器件晶片和载体晶片之间的对准。

    METHOD OF MANUFACTURING A PLURALITY OF ELECTRONIC ASSEMBLIES
    3.
    发明申请
    METHOD OF MANUFACTURING A PLURALITY OF ELECTRONIC ASSEMBLIES 有权
    制造大量电子组件的方法

    公开(公告)号：US20130032953A1

    公开(公告)日：2013-02-07

    申请号：US13620477

    申请日：2012-09-14

    申请人： John J. Beatty ,  Jason A. Garcia

    发明人： John J. Beatty ,  Jason A. Garcia

    IPC分类号： H01L23/538

    CPC分类号： H01L25/50 ,  H01L21/563 ,  H01L23/3114 ,  H01L25/0657 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2924/19041

    摘要： A method of manufacturing a plurality of electronic devices is provided. Each one of a plurality of first conductive terminals on a plurality of integrated circuits formed on a device wafer is connected to a respective one of a plurality of second conductive terminals on a carrier wafer, thereby forming a combination wafer assembly. The combination wafer assembly is singulated between the integrated circuits to form separate electronic assemblies. The combination wafer assembly also allows for an underfill material to be introduced and to cured at wafer level and for thinning of the device wafer at wafer level without requiring a separate supporting substrate. Alignment between the device wafer and the carrier wafer can be tested by conducting a current through first and second conductors in the device and carrier wafers, respectively.

    摘要翻译： 提供一种制造多个电子设备的方法。 形成在器件晶片上的多个集成电路上的多个第一导电端子中的每一个连接到载体晶片上的多个第二导电端子中的相应一个，从而形成组合晶片组件。 组合晶片组件在集成电路之间分离以形成分离的电子组件。 组合晶片组件还允许底片填充材料被引入并在晶片级别固化并且在晶片级别使器件晶片变薄，而不需要单独的支撑衬底。 可以通过分别通过在器件和载体晶片中的电流通过第一和第二导体来测试器件晶片和载体晶片之间的对准。

    Die handling system
    5.
    发明授权
    Die handling system 有权
    模具处理系统

    公开(公告)号：US07276396B2

    公开(公告)日：2007-10-02

    申请号：US10959931

    申请日：2004-10-06

    申请人： Jason A. Garcia

    发明人： Jason A. Garcia

    IPC分类号： H01L21/00

    CPC分类号： H01L24/75 ,  H01L21/67132 ,  H01L2221/68313 ,  H01L2221/68322 ,  H01L2224/16 ,  H01L2224/75 ,  H01L2224/75301 ,  H01L2224/7565 ,  H01L2224/75745 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/14 ,  Y10T156/12 ,  H01L2224/0401

    摘要： A system may include singulation of a semiconductor wafer to separate a plurality of integrated circuit die that are integrated into the semiconductor wafer; coupling of a support to an integrated circuit substrate of one of the plurality of integrated circuit die, and decoupling of the one integrated circuit die from the singulated semiconductor wafer while the support is coupled to the integrated circuit substrate. According to some embodiments, a second side of the one integrated circuit die is not touched during the coupling and the decoupling, the second side being opposite to the integrated circuit substrate.

    摘要翻译： 系统可以包括半导体晶片的分离以分离集成到半导体晶片中的多个集成电路裸片; 将支撑件耦合到多个集成电路管芯中的一个集成电路管芯的集成电路基板，以及在支撑件耦合到集成电路基板的同时将单个集成电路管芯与分离的半导体晶片分离。 根据一些实施例，在耦合和解耦期间，一个集成电路管芯的第二侧不被接触，第二侧与集成电路衬底相对。

    Methods and apparatuses for microelectronic assembly having a material with a variable viscosity around a MEMS device
    6.
    发明授权
    Methods and apparatuses for microelectronic assembly having a material with a variable viscosity around a MEMS device 有权
    用于微电子组件的方法和装置具有在MEMS器件周围具有可变粘度的材料

    公开(公告)号：US07352039B2

    公开(公告)日：2008-04-01

    申请号：US11089906

    申请日：2005-03-24

    申请人： Jason A. Garcia

    发明人： Jason A. Garcia

    IPC分类号： H01L23/10

    CPC分类号： B81B7/0058 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/00014

    摘要： Various methods and apparatuses are described in which a micro-electro-mechanical systems (MEMS) device is encapsulated with a material having a variable viscosity with a viscosity value high enough to retard foreign material from contacting the MEMS device during an electronic package assembly process. The material having the variable viscosity may be affixed to a cavity area surrounding the MEMS device prior to an epoxy being dispensed onto the electronic package assembly. The temperature and pressure conditions of the electronic package assembly process may be controlled to ensure when the epoxy is dispensed that the material having the variable viscosity has a high enough viscosity value to retard foreign material from contacting the MEMS device during the electronic package assembly process.

    摘要翻译： 描述了各种方法和装置，其中微电子机械系统（MEMS）装置用具有可变粘度的材料包封，其粘度值足够高以在电子封装组装过程期间阻止异物接触MEMS装置。 具有可变粘度的材料可以在将环氧树脂分配到电子封装组件之前固定到围绕MEMS器件的空腔区域。 可以控制电子封装组装过程的温度和压力条件，以确保当分配环氧树脂时，具有可变粘度的材料具有足够高的粘度值，以在电子封装组装过程期间阻止异物接触MEMS器件。

    Traceability marks
    8.
    发明授权
    Traceability marks 有权
    可追溯性标记

    公开(公告)号：US08064728B2

    公开(公告)日：2011-11-22

    申请号：US11694893

    申请日：2007-03-30

    申请人： Jason A. Garcia

    发明人： Jason A. Garcia

    IPC分类号： G06K9/00 ,  G06K9/46 ,  G06K9/36 ,  G06K9/62 ,  G06K9/66 ,  G06K7/10 ,  H04N9/47 ,  H04N7/18

    CPC分类号： G06K19/06037

    摘要： The formation of marks on devices is described. In one embodiment, a method for marking a device includes forming a plurality of unique marks sequentially on a device. The method includes defining a virtual array having a plurality of cells extending in an x-direction and a plurality of cells extending in a y-direction, wherein the marks are each positioned in a cell in the virtual array. The method also includes capturing an image including the relative cell position of the marks within the virtual array and converting the relative position of the marks within the virtual array into a set of coordinates including an x value along the x-direction and a y value along the y-direction for each of the marks. The method also includes generating a device identification using a plurality of the x values and the y values. Other embodiments are described and claimed.

    摘要翻译： 描述了器件上的标记形成。 在一个实施例中，用于标记设备的方法包括在设备上顺序地形成多个唯一标记。 该方法包括定义具有在x方向上延伸的多个单元的虚拟阵列和沿y方向延伸的多个单元，其中，所述标记各自位于虚拟阵列中的单元中。 该方法还包括捕获包括虚拟阵列内的标记的相对单元位置的图像，并将虚拟阵列内的标记的相对位置转换成包括x方向上的x值和沿着x方向的ay值的一组坐标 y方向为每个标记。 该方法还包括使用多个x值和y值生成设备标识。 描述和要求保护其他实施例。

    TRACEABILITY MARKS
    9.
    发明申请
    TRACEABILITY MARKS 有权
    可追溯性标志

    公开(公告)号：US20080240614A1

    公开(公告)日：2008-10-02

    申请号：US11694893

    申请日：2007-03-30

    申请人： Jason A. Garcia

    发明人： Jason A. Garcia

    IPC分类号： G06K9/36

    CPC分类号： G06K19/06037

    摘要： The formation of marks on devices is described. In one embodiment, a method for marking a device includes forming a plurality of unique marks sequentially on a device. The method includes defining a virtual array having a plurality of cells extending in an x-direction and a plurality of cells extending in a y-direction, wherein the marks are each positioned in a cell in the virtual array. The method also includes capturing an image including the relative cell position of the marks within the virtual array and converting the relative position of the marks within the virtual array into a set of coordinates including an x value along the x-direction and a y value along the y-direction for each of the marks. The method also includes generating a device identification using a plurality of the x values and the y values. Other embodiments are described and claimed.

    摘要翻译： 描述了器件上的标记形成。 在一个实施例中，用于标记设备的方法包括在设备上顺序地形成多个唯一标记。 该方法包括定义具有在x方向上延伸的多个单元的虚拟阵列和沿y方向延伸的多个单元，其中，所述标记各自位于虚拟阵列中的单元中。 该方法还包括捕获包括虚拟阵列内的标记的相对单元位置的图像，并将虚拟阵列内的标记的相对位置转换成包括x方向上的x值和沿着x方向的ay值的一组坐标 y方向为每个标记。 该方法还包括使用多个x值和y值生成设备标识。 描述和要求保护其他实施例。