公开(公告)号：US08709869B2

公开(公告)日：2014-04-29

申请号：US13620477

申请日：2012-09-14

申请人： John J. Beatty ,  Jason A. Garcia

发明人： John J. Beatty ,  Jason A. Garcia

IPC分类号： H01L21/00

CPC分类号： H01L25/50 ,  H01L21/563 ,  H01L23/3114 ,  H01L25/0657 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2924/19041

摘要： A method of manufacturing a plurality of electronic devices is provided. Each one of a plurality of first conductive terminals on a plurality of integrated circuits formed on a device wafer is connected to a respective one of a plurality of second conductive terminals on a carrier wafer, thereby forming a combination wafer assembly. The combination wafer assembly is singulated between the integrated circuits to form separate electronic assemblies. The combination wafer assembly also allows for an underfill material to be introduced and to cured at wafer level and for thinning of the device wafer at wafer level without requiring a separate supporting substrate. Alignment between the device wafer and the carrier wafer can be tested by conducting a current through first and second conductors in the device and carrier wafers, respectively.

摘要翻译： 提供一种制造多个电子设备的方法。 形成在器件晶片上的多个集成电路上的多个第一导电端子中的每一个连接到载体晶片上的多个第二导电端子中的相应一个，从而形成组合晶片组件。 组合晶片组件在集成电路之间分离以形成分离的电子组件。 组合晶片组件还允许底片填充材料被引入并在晶片级别固化并且在晶片级别使器件晶片变薄，而不需要单独的支撑衬底。 可以通过分别通过在器件和载体晶片中的电流通过第一和第二导体来测试器件晶片和载体晶片之间的对准。

公开(公告)号：US07421778B2

公开(公告)日：2008-09-09

申请号：US11388100

申请日：2006-03-22

申请人： Jason A. Garcia ,  John J. Beatty

发明人： Jason A. Garcia ,  John J. Beatty

IPC分类号： H05K3/36

CPC分类号： H05K3/3436 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05647 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13015 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/14051 ,  H01L2224/14141 ,  H01L2224/14142 ,  H01L2224/14145 ,  H01L2224/14146 ,  H01L2224/14177 ,  H01L2224/14505 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/81801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/3511 ,  H05K3/3426 ,  H05K2201/068 ,  H05K2201/10242 ,  H05K2201/10909 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49204 ,  Y10T29/49222 ,  H01L2924/00014

摘要： According to one aspect of the invention, an electronic assembly is provided. The electronic assembly includes a first substrate having an integrated circuit formed therein and a second substrate. The first and second substrates are interconnected by a plurality of bi-material interconnects that are electrically connected to the integrated circuit and have a first component comprising a conductive first material with a first coefficient of thermal expansion and a second component comprising a second material with a second coefficient of thermal expansion. The first and second components are connected and shaped such that when the temperature of the bi-material interconnects changes the interconnects each bend towards the first or second component. When the temperature of the second substrate increases, the second substrate expands away from a central portion thereof. The bi-material interconnects are arranged such that the bi-material interconnects bend away from the central portion of the second substrate.

摘要翻译： 根据本发明的一个方面，提供一种电子组件。 电子组件包括其中形成有集成电路的第一基板和第二基板。 第一和第二基板通过电连接到集成电路的多个双材料互连互连，并且具有第一部件，该第一部件包括具有第一热膨胀系数的导电第一材料，第二部件包括具有第二材料的第二部件， 第二热膨胀系数。 第一和第二部件被连接和成形，使得当双材料互连件的温度改变时，互连件每个朝着第一或第二部件弯曲。 当第二基板的温度升高时，第二基板从其中心部分扩展。 双材料互连布置成使得双材料互连件远离第二基板的中心部分弯曲。

公开(公告)号：US07183493B2

公开(公告)日：2007-02-27

申请号：US10883433

申请日：2004-06-30

申请人： Jason A. Garcia ,  John J. Beatty

发明人： Jason A. Garcia ,  John J. Beatty

IPC分类号： H05K1/09

CPC分类号： H05K3/3436 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05647 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13015 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/14051 ,  H01L2224/14141 ,  H01L2224/14142 ,  H01L2224/14145 ,  H01L2224/14146 ,  H01L2224/14177 ,  H01L2224/14505 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/81801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/3511 ,  H05K3/3426 ,  H05K2201/068 ,  H05K2201/10242 ,  H05K2201/10909 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49204 ,  Y10T29/49222 ,  H01L2924/00014

摘要： According to one aspect of the invention, an electronic assembly is provided. The electronic assembly includes a first substrate having an integrated circuit formed therein and a second substrate. The first and second substrates are interconnected by a plurality of bi-material interconnects that are electrically connected to the integrated circuit and have a first component comprising a conductive first material with a first coefficient of thermal expansion and a second component comprising a second material with a second coefficient of thermal expansion. The first and second components are connected and shaped such that when the temperature of the bi-material interconnects changes the interconnects each bend towards the first or second component. When the temperature of the second substrate increases, the second substrate expands away from a central portion thereof. The bi-material interconnects are arranged such that the bi-material interconnects bend away from the central portion of the second substrate.

摘要翻译： 根据本发明的一个方面，提供一种电子组件。 电子组件包括其中形成有集成电路的第一基板和第二基板。 第一和第二基板通过电连接到集成电路的多个双材料互连互连，并且具有第一部件，该第一部件包括具有第一热膨胀系数的导电第一材料，第二部件包括具有第二材料的第二部件， 第二热膨胀系数。 第一和第二部件被连接和成形，使得当双材料互连件的温度改变时，互连件每个朝着第一或第二部件弯曲。 当第二基板的温度升高时，第二基板从其中心部分扩展。 双材料互连布置成使得双材料互连件远离第二基板的中心部分弯曲。

公开(公告)号：US07179093B2

公开(公告)日：2007-02-20

申请号：US11174074

申请日：2005-06-30

申请人： Nicholas L. Holmberg ,  John J. Beatty ,  Pramod Malatkar

发明人： Nicholas L. Holmberg ,  John J. Beatty ,  Pramod Malatkar

IPC分类号： H01R13/62

CPC分类号： H05K7/1061 ,  H01R2201/20

摘要： In some embodiments, a retractable ledge socket is presented. In this regard, a socket ledge is introduced to receive a processor, and to reposition to allow the processor to contact socket connections. Other embodiments are also disclosed and claimed.

摘要翻译： 在一些实施例中，呈现可伸缩的突出插座。 在这方面，引入一个插座凸缘以接收一个处理器，并重新定位以允许处理器与插座连接接触。 还公开并要求保护其他实施例。

公开(公告)号：US20130032953A1

公开(公告)日：2013-02-07

申请号：US13620477

申请日：2012-09-14

申请人： John J. Beatty ,  Jason A. Garcia

发明人： John J. Beatty ,  Jason A. Garcia

IPC分类号： H01L23/538

CPC分类号： H01L25/50 ,  H01L21/563 ,  H01L23/3114 ,  H01L25/0657 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2924/19041

摘要： A method of manufacturing a plurality of electronic devices is provided. Each one of a plurality of first conductive terminals on a plurality of integrated circuits formed on a device wafer is connected to a respective one of a plurality of second conductive terminals on a carrier wafer, thereby forming a combination wafer assembly. The combination wafer assembly is singulated between the integrated circuits to form separate electronic assemblies. The combination wafer assembly also allows for an underfill material to be introduced and to cured at wafer level and for thinning of the device wafer at wafer level without requiring a separate supporting substrate. Alignment between the device wafer and the carrier wafer can be tested by conducting a current through first and second conductors in the device and carrier wafers, respectively.

摘要翻译： 提供一种制造多个电子设备的方法。 形成在器件晶片上的多个集成电路上的多个第一导电端子中的每一个连接到载体晶片上的多个第二导电端子中的相应一个，从而形成组合晶片组件。 组合晶片组件在集成电路之间分离以形成分离的电子组件。 组合晶片组件还允许底片填充材料被引入并在晶片级别固化并且在晶片级别使器件晶片变薄，而不需要单独的支撑衬底。 可以通过分别通过在器件和载体晶片中的电流通过第一和第二导体来测试器件晶片和载体晶片之间的对准。