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    Wireless devices including printed integrated circuitry and methods for manufacturing and using the same
    1.
    发明授权
    Wireless devices including printed integrated circuitry and methods for manufacturing and using the same 有权
    无线设备，包括印刷集成电路及其制造和使用方法

    公开(公告)号：US09004366B2

    公开(公告)日：2015-04-14

    申请号：US12249707

    申请日：2008-10-10

    Applicant: Patrick Smith ,  Criswell Choi ,  Vikram Pavate ,  James Montague Cleeves ,  Vivek Subramanian ,  Richard Young ,  Vince Biviano

    Inventor： Patrick Smith ,  Criswell Choi ,  Vikram Pavate ,  James Montague Cleeves ,  Vivek Subramanian ,  Richard Young ,  Vince Biviano

    IPC: G06K19/06 ,  G08B13/14 ,  H01L21/30 ,  H01L23/02 ,  G06K19/077

    CPC classification number: G06K19/07749 ,  G06K19/0775 ,  G06K19/07752 ,  Y10T29/49124

    Abstract: Printed integrated circuitry and attached antenna and/or inductor for sensors, electronic article surveillance (EAS), radio frequency (RF) and/or RF identification (RFID) tags and devices, and methods for its manufacture. The tag generally includes printed integrated circuitry on one carrier and an antenna and/or inductor on another carrier, the integrated circuitry being electrically coupled to the antenna and/or inductor. The method of manufacture generally includes of printing an integrated circuit having a plurality of first pads on a carrier, forming an antenna and/or inductor having a plurality of second pads on a substrate, and attaching at least two of the first pads of the printed integrated circuit to corresponding second pads of the antenna and/or inductor. The present invention advantageously provides a low cost RFID tag capable of operating at MHz frequencies that can be manufactured in a shorter time period than conventional RFID tags that manufacture all active electrical devices on a conventional wafer.

    Abstract translation: 用于传感器，电子物品监视（EAS），射频（RF）和/或RF识别（RFID）标签和设备的印刷集成电路和连接的天线和/或电感器及其制造方法。 标签通常包括在一个载体上的印刷集成电路和另一个载体上的天线和/或电感器，该集成电路电耦合到天线和/或电感器。 制造方法通常包括印刷在载体上具有多个第一焊盘的集成电路，形成在衬底上具有多个第二焊盘的天线和/或电感器，以及附接印刷的至少两个第一焊盘 集成电路到天线和/或电感器的对应的第二焊盘。 本发明有利地提供了一种低成本的RFID标签，能够以比在传统晶片上制造所有有源电气设备的常规RFID标签更短的时间周期内以MHz频率工作。

    Printed non-volatile memory
    2.
    发明授权
    Printed non-volatile memory 有权
    打印的非易失性存储器

    公开(公告)号：US08796774B2

    公开(公告)日：2014-08-05

    申请号：US13585673

    申请日：2012-08-14

    Applicant: Arvind Kamath ,  Patrick Smith ,  James Montague Cleeves

    Inventor： Arvind Kamath ,  Patrick Smith ,  James Montague Cleeves

    IPC: H01L29/66 ,  H01L29/788

    CPC classification number: H01L21/28518 ,  H01L21/288 ,  H01L21/76801 ,  H01L21/76895 ,  H01L27/115 ,  H01L27/11558 ,  H01L27/1292 ,  H01L29/66757 ,  H01L29/66825 ,  H01L29/7881

    Abstract: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.

    Abstract translation: 公开了一种非易失性存储单元，其具有位于相同水平位置并且间隔开预定距离的第一和第二半岛，所述第一半岛具有提供控制栅极和所述第二半岛岛提供源极和漏极端子; 在所述第一半导体岛的至少一部分上的栅介质层; 在所述第二半导体岛的至少一部分上的隧道介电层; 至少部分栅极电介质层和隧道电介质层上的浮栅; 以及与控制栅极以及源极和漏极端子电接触的金属层。 在一个有利的实施例中，可以使用“全印刷”工艺技术来制造非易失性存储单元。

    Printed Dopant Layers
    3.
    发明申请
    Printed Dopant Layers 有权
    印刷掺杂层

    公开(公告)号：US20140094004A1

    公开(公告)日：2014-04-03

    申请号：US13633816

    申请日：2012-10-02

    Applicant: Arvind Kamath ,  James Montague Cleeves ,  Joerg Rockenberger ,  Patrick Smith ,  Fabio Zürcher

    Inventor： Arvind Kamath ,  James Montague Cleeves ,  Joerg Rockenberger ,  Patrick Smith ,  Fabio Zürcher

    IPC: H01L21/336

    CPC classification number: H01L27/1292 ,  H01L29/66757

    Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.

    Abstract translation: 一种用于制造诸如MOS晶体管的电子器件的方法，包括以下步骤：在电功能衬底上形成多个半导体岛，在第一半导体岛子集上或第二子体上印刷第一介电层， 在半导体岛的第二子集上或之上，以及退火。 第一介电层包含第一掺杂剂，并且（任选的）第二介电层包含不同于第一掺杂剂的第二掺杂剂。 电介质层，半导体岛和衬底被充分退火以将第一掺杂剂扩散到半导体岛的第一子集中，并且当存在时将第二掺杂剂扩散到半导体岛的第二子集中。

    Multi-mode tags and methods of making and using the same
    5.
    发明授权
    Multi-mode tags and methods of making and using the same 失效
    多模式标签及其制作和使用方法

    公开(公告)号：US07750792B2

    公开(公告)日：2010-07-06

    申请号：US11870775

    申请日：2007-10-11

    Applicant: Patrick Smith ,  James Montague Cleeves ,  Vikram Pavate ,  Vivek Subramanian

    Inventor： Patrick Smith ,  James Montague Cleeves ,  Vikram Pavate ,  Vivek Subramanian

    IPC: H04Q5/22

    CPC classification number: G06K19/0707 ,  G06K19/0712 ,  G06K19/0723 ,  G08B13/2448 ,  H04W88/06 ,  Y02D70/166

    Abstract: Multi-mode (e.g., EAS and RFID) tags and methods for making and using the same are disclosed. The tag generally includes an antenna, an electronic article surveillance (EAS) function block coupled to the antenna, and one or more identification function blocks coupled to the antenna in parallel with the EAS function block. The method of reading the tag generally includes the steps of applying an electric field to the tag, detecting the tag when the electric field has a relatively low power, and detecting an identification signal from the tag when the electric field has a relatively high power. The present invention advantageously enables a single tag to be used for both inventory and anti-theft purposes, thereby improving inventory management and control at reduced system and/or “per-article” costs.

    Abstract translation: 公开了多模式（例如，EAS和RFID）标签及其制造和使用方法。 标签通常包括耦合到天线的天线，电子物品监视（EAS）功能块以及与EAS功能块并行耦合到天线的一个或多个识别功能块。 读取标签的方法通常包括对标签施加电场的步骤，当电场具有相对低的功率时检测标签，以及当电场具有相对高的功率时，从标签中检测识别信号。 本发明有利地使单个标签用于库存和防盗目的，从而改进库存管理和减少系统和/或“每件物品”成本的控制。

    Printed dopant layers
    7.
    发明授权
    Printed dopant layers 有权
    印刷掺杂剂层

    公开(公告)号：US08304780B2

    公开(公告)日：2012-11-06

    申请号：US12797274

    申请日：2010-06-09

    Applicant: Arvind Kamath ,  James Montague Cleeves ,  Joerg Rockenberger ,  Patrick Smith ,  Fabio Zürcher

    Inventor： Arvind Kamath ,  James Montague Cleeves ,  Joerg Rockenberger ,  Patrick Smith ,  Fabio Zürcher

    IPC: H01L29/10 ,  H01L29/76 ,  H01L31/036 ,  H01L31/112

    CPC classification number: H01L21/316 ,  H01L21/02211 ,  H01L21/02288 ,  H01L21/02318 ,  H01L21/3165 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/66757 ,  H01L29/78621

    Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.

    Abstract translation: 一种用于制造诸如MOS晶体管的电子器件的方法，包括以下步骤：在电功能衬底上形成多个半导体岛，在第一半导体岛子集上或第二子体上印刷第一介电层， 在半导体岛的第二子集上或之上，以及退火。 第一介电层包含第一掺杂剂，并且（任选的）第二介电层包含不同于第一掺杂剂的第二掺杂剂。 电介质层，半导体岛和衬底被充分退火以将第一掺杂剂扩散到半导体岛的第一子集中，并且当存在时将第二掺杂剂扩散到半导体岛的第二子集中。

    Printed dopant layers
    8.
    发明授权
    Printed dopant layers 有权
    印刷掺杂剂层

    公开(公告)号：US07767520B2

    公开(公告)日：2010-08-03

    申请号：US11888949

    申请日：2007-08-03

    Applicant: Arvind Kamath ,  James Montague Cleeves ,  Joerg Rockenberger ,  Patrick Smith ,  Fabio Zürcher

    Inventor： Arvind Kamath ,  James Montague Cleeves ,  Joerg Rockenberger ,  Patrick Smith ,  Fabio Zürcher

    IPC: H01L21/8242

    CPC classification number: H01L21/316 ,  H01L21/02211 ,  H01L21/02288 ,  H01L21/02318 ,  H01L21/3165 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/66757 ,  H01L29/78621

    Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.

    Abstract translation: 一种用于制造诸如MOS晶体管的电子器件的方法，包括以下步骤：在电功能衬底上形成多个半导体岛，在第一半导体岛子集上或第二子体上印刷第一介电层， 在半导体岛的第二子集上或之上，以及退火。 第一介电层包含第一掺杂剂，并且（任选的）第二介电层包含不同于第一掺杂剂的第二掺杂剂。 电介质层，半导体岛和衬底被充分退火以将第一掺杂剂扩散到半导体岛的第一子集中，并且当存在时将第二掺杂剂扩散到半导体岛的第二子集中。

    Printed Non-Volatile Memory
    9.
    发明申请
    Printed Non-Volatile Memory 有权
    印刷非易失性存储器

    公开(公告)号：US20100163962A1

    公开(公告)日：2010-07-01

    申请号：US12723542

    申请日：2010-03-12

    Applicant: Arvind Kamath ,  Patrick Smith ,  James Montague Cleeves

    Inventor： Arvind Kamath ,  Patrick Smith ,  James Montague Cleeves

    IPC: H01L29/788

    CPC classification number: H01L21/28518 ,  H01L21/288 ,  H01L21/76801 ,  H01L21/76895 ,  H01L27/115 ,  H01L27/11558 ,  H01L27/1292 ,  H01L29/66757 ,  H01L29/66825 ,  H01L29/7881

    Abstract: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.

    Abstract translation: 公开了一种非易失性存储器单元，其具有在相同水平位置处并且间隔开预定距离的第一和第二半导体岛，所述第一半岛具有提供控制栅极和所述第二半岛岛提供源极和漏极端子; 在所述第一半导体岛的至少一部分上的栅介质层; 在所述第二半导体岛的至少一部分上的隧道电介质层; 至少部分栅极电介质层和隧道电介质层上的浮栅; 以及与控制栅极以及源极和漏极端子电接触的金属层。 在一个有利的实施例中，可以使用“全印刷”工艺技术来制造非易失性存储单元。

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