公开(公告)号：US20210098412A1

公开(公告)日：2021-04-01

申请号：US16874527

申请日：2020-05-14

申请人： INVENSAS BONDING TECHNOLOGIES, INC.

发明人： Belgacem Haba ,  Laura Wills Mirkarimi ,  Javier A. DeLaCruz ,  Rajesh Katkar ,  Cyprian Emeka Uzoh ,  Guilian Gao ,  Thomas Workman

IPC分类号： H01L23/00 ,  H01L23/31

摘要： A bonded structure can comprise a first element and a second element. The first element has a first dielectric layer including a first bonding surface and at least one first side surface of the first element. The second element has a second dielectric layer including a second bonding surface and at least one second side surface of the second element. The second bonding surface of the second element is directly bonded to the first bonding surface of the first element without an adhesive.

公开(公告)号：US20220320035A1

公开(公告)日：2022-10-06

申请号：US17657332

申请日：2022-03-30

申请人： INVENSAS BONDING TECHNOLOGIES, INC.

发明人： Cyprian Emeka Uzoh ,  Thomas Workman

IPC分类号： H01L23/00

摘要： Disclosed herein are methods for direct bonding. In some embodiments, a direct bonding method comprises preparing a first bonding surface of a first element for direct bonding to a second bonding surface of a second element; and after the preparing, providing a protective layer over the prepared first bonding surface of the first element, the protective layer having a thickness less than 3 microns.

公开(公告)号：US11296053B2

公开(公告)日：2022-04-05

申请号：US16911360

申请日：2020-06-24

申请人： INVENSAS BONDING TECHNOLOGIES, INC.

发明人： Cyprian Emeka Uzoh ,  Rajesh Katkar ,  Thomas Workman ,  Guilian Gao ,  Gaius Gillman Fountain, Jr. ,  Laura Wills Mirkarimi ,  Belgacem Haba ,  Gabriel Z. Guevara ,  Joy Watanabe

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

摘要： Direct bonded stack structures for increased reliability and improved yields in microelectronics are provided. Structural features and stack configurations are provided for memory modules and 3DICs to reduce defects in vertically stacked dies. Example processes alleviate warpage stresses between a thicker top die and direct bonded dies beneath it, for example. An etched surface on the top die may relieve warpage stresses. An example stack may include a compliant layer between dies. Another stack configuration replaces the top die with a layer of molding material to circumvent warpage stresses. An array of cavities on a bonding surface can alleviate stress forces. One or more stress balancing layers may also be created on a side of the top die or between other dies to alleviate or counter warpage. Rounding of edges can prevent stresses and pressure forces from being destructively transmitted through die and substrate layers. These measures may be applied together or in combinations in a single package.

公开(公告)号：US20240038633A1

公开(公告)日：2024-02-01

申请号：US17876376

申请日：2022-07-28

申请人： Invensas Bonding Technologies, Inc.

发明人： Belgacem Haba ,  Thomas Workman ,  Cyprian Emeka Uzoh ,  Guilian Gao ,  Rajesh Katkar

IPC分类号： H01L23/473 ,  H01L23/467 ,  H01L25/10 ,  H01L25/18 ,  H01L23/00 ,  H01L25/065 ,  H01L23/32

CPC分类号： H01L23/473 ,  H01L23/467 ,  H01L25/105 ,  H01L25/18 ,  H01L24/05 ,  H01L24/08 ,  H01L25/0657 ,  H01L23/32 ,  H01L24/94 ,  H01L24/80 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2225/06517 ,  H01L2224/05647 ,  H01L2224/05686 ,  H01L2224/05693 ,  H01L2924/0544 ,  H01L2924/0504 ,  H01L2924/059 ,  H01L2924/05432 ,  H01L2924/04642 ,  H01L2224/08245 ,  H01L2224/94 ,  H01L2224/80486 ,  H01L2224/80896 ,  H01L2224/80895

摘要： Embodiments herein provide for fluidic cooling assemblies embedded within a device package and related manufacturing methods. In one embodiment, the cooling assembly includes a cold plate body attached to a singulated device and a manifold lid attached to the cold plate body. The cold plate body has a first side adjacent to the singulated device and an opposite second side, and the manifold lid is attached to the second side. In some embodiments, the first side of the cold plate body and the backside of the singulated device each comprise a dielectric material surface, the cold plate body is attached to the singulated device by direct dielectric bonds formed between the dielectric material surfaces, the cold plate body, and the manifold lid define one or more cavities, and the one or more cavities form at least a portion of a fluid flow path from an inlet to an outlet of the manifold lid.

公开(公告)号：US20220293567A1

公开(公告)日：2022-09-15

申请号：US17681563

申请日：2022-02-25

申请人： INVENSAS BONDING TECHNOLOGIES, INC.

发明人： Cyprian Emeka Uzoh ,  Rajesh Katkar ,  Thomas Workman ,  Guilian Gao ,  Gaius Gillman Fountain, JR. ,  Laura Wills Mirkarimi ,  Belgacem Haba ,  Gabriel Z. Guevara ,  Joy Watanabe

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

摘要： Direct bonded stack structures for increased reliability and improved yields in microelectronics are provided. Structural features and stack configurations are provided for memory modules and 3DICs to reduce defects in vertically stacked dies. Example processes alleviate warpage stresses between a thicker top die and direct bonded dies beneath it, for example. An etched surface on the top die may relieve warpage stresses. An example stack may include a compliant layer between dies. Another stack configuration replaces the top die with a layer of molding material to circumvent warpage stresses. An array of cavities on a bonding surface can alleviate stress forces. One or more stress balancing layers may also be created on a side of the top die or between other dies to alleviate or counter warpage. Rounding of edges can prevent stresses and pressure forces from being destructively transmitted through die and substrate layers. These measures may be applied together or in combinations in a single package.